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Old 05-04-07   #1 (permalink)
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Default DDR2 memory clock vs cpu base clock

OK im sure the answer is somewhere here but i could not find it for 100% certain.

i see the sticky up there and thats what really got my confused.

im an AMD guy and have not yet built a DDR2 system (have been waiting for vista and dx10 and everything to work themselves out)

now with DDR it was simple memory clock = CPU clock, woo done (or with a divider but you get the point)

but im not getting it here with DDR2, according to that sticky it looks like the memory clock is determined by the final CPU clock and not the base clock


IE 200x15 = 3000 /8 = 375 /2 = 187 chip speed?

yes? no? maybe? kinda?

if so thats a big difference from before, would that meen that nothing is directly dependant on the base speed of the CPU anymore?
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Old 05-04-07   #2 (permalink)
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DDR2 overclocks the exact same way like DDR does if that what you wanted to know.

So it's like this you rise the fsb from 200 to 230 mhz the DDR2-800 will go to DDR2-920
Also memory speed is not affacted by CPU speeds only by messing with Cpu/ram ratios or the FSB(base clock)

Hope I helped you on your question.
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Old 05-04-07   #3 (permalink)
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DDR2 will run at an effective speed of 4x CPU clock. Actual speed is still 200MHz (as 4 bits of data can be transferred per clock, it's as if it is running at 800MHz while transferring 1 bit per clock).

DDR is the same, but 2x, and 2 bits of data per clock.fff
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Old 05-04-07   #4 (permalink)
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you guys say that and it makes sense, but why does the chart in the sticky http://i147.photobucket.com/albums/r...337/DDR2_2.jpg

show in the last table that 200mhz fsb on the cpu yields 750 as an effective rate for ddr2 800

according to that, and a few other places ive read are pointing to the ram speed being determined by the CPU final clock and not directly the fsb


also thealmighty one, i was under the impression that ddr2 transfered 2 bits per hert just like DDR, using the same memory speed, but double the bus speed IE 200mhz memory speed x 2 at a time = a 400mhz actuall bus speed x2 bits per clock for an effective speed of 800
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Old 05-04-07   #5 (permalink)
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Quote:
Originally Posted by IwubAMD View Post
show in the last table that 200mhz fsb on the cpu yields 750 as an effective rate for ddr2 800
I have no idea why it says that.

Quote:
Originally Posted by IwubAMD View Post
also thealmighty one, i was under the impression that ddr2 transfered 2 bits per hert just like DDR, using the same memory speed, but double the bus speed IE 200mhz memory speed x 2 at a time = a 400mhz actuall bus speed x2 bits per clock for an effective speed of 800
Go here. Scroll down a bit for the picture. The increase in data transfer rate is the main difference between DDR2 and DDR (that's why timings are set to higher clocks [higher clocks compensate for the higher latency clocks]; the memory needs more time to find and prepare 4 bits of data instead of 2 bits of data). There are a few other, minor, differences as well, all explained in that link.
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Old 05-04-07   #6 (permalink)
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Quote:
Originally Posted by thealmightyone View Post
I have no idea why it says that.
well ive read both statements in multiple places (that its governed by base cpu speed and that its governed by final cpu speed)

and that link shows what i was saying, that ddr800 runs 400mhz actual bus speed +DDR, i understnad its 4 bits per clock from the memory, but to the cpu its 2 bits per clock @ 400mhz which is what i was trying to say

http://www.lostcircuits.com/memory/ddrii/6.shtml





anyway ive had that argument already this week, im just trying to figure out if the divder is off the CPU bus or the CPU final frequency since im reading it in both ways in several places, but im looking for some sort of confirmation or explanation as to why people are saying the two diffrent ways and as to which is correct
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Old 05-04-07   #7 (permalink)
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heres another one of the links i was talking about showing the divider acting on the cpu final frequency and not the BUS frequency

http://www.anandtech.com/cpuchipsets...px?i=2762&p=10

again this is why im confused since DDR dividers always acted on bus frequency
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Old 05-04-07   #8 (permalink)
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My impression is that memory speed is calculated from the bus speed, but I can't find anything that agrees/disagrees with me.

EDIT: The odd divisor problem is down to the memory controller, not the memory.
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Old 05-04-07   #9 (permalink)
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Quote:
Originally Posted by thealmightyone View Post
My impression is that memory speed is calculated from the bus speed, but I can't find anything that agrees/disagrees with me.

EDIT: The odd divisor problem is down to the memory controller, not the memory.
no i know its not the memory, its obviously the memory controller, because well its the controller

but again, im just trying to figure out if this is right the the divider now acts on the final cpu frequency rather than the bus frequency


if this is true, and it seems more and more like it is, then the bus frequency has no bearing anymore since memory was the last thing directly related to bus frequency (in DDR)

so AMD system are now 100% a-syncronous?



edit: i just found this too

http://i161.photobucket.com/albums/t...untitled-1.jpg

thats clearly showing the divder operating on the final clock of the CPU and not the bus



so what gives?
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Semi custom Danger den split level case
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Lapped Q6600 G0 to accompany it!

My car: 1 2 BMW 335i coupe TT 440HP 460TQ!
(yea i have an extreme need for speed in every aspect of my life )

System: Black-Hole
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Q6600 g0 @ 3.6Ghz (450x8) 1.42Vcore 38idle 60load
Motherboard
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Last edited by IwubAMD : 05-04-07 at 05:52 PM
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Old 05-04-07   #10 (permalink)
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Yeah, it seems that the memory controller for AM2 has a thing with funny CPU multipliers. It all confuses me a bit, to be honest. Well, not confusion, I'm just too lazy to see how everything works.
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