demol1sh3d

How memory is organized

Before we can discuss timings we need to understand a little about how memory is organized and accessed. Your RAM is basically laid out like an Excel spreadsheet. In other words, it is organized in rows and columns. Suppose that you have a 16 megabit chip on your memory stick. This chip will normally have 4M (4,194,304) address locations, or cells to follow our spreadsheet example, with each one containing 4 bits of data. Since 2^22 = 4,194,304, 22 bit addresses are required to address that many cells. The memory controller will use the first 11 bits to reference the column and the last 11 bits to reference the row. This method allows the memory controller to uniquely address each row and column in your RAM just like you would when you use an Excel spreadsheet. This explanation may seem a little complicated, but it will help us understand memory timings, which is what this FAQ is all about.

What are timings?

Timings generally refer to how long it takes for the memory to get ready for access by the memory controller and CPU. RAM timings play an important role in your system’s overall performance as well as stability. If the memory tries to give up something before the CPU is ready for it, then you could have problems. That’s when someone might say, “you need to loosen your timings.” That way, you allow a little more time for the rest of the system to get ready for whatever action the memory is getting ready for. The converse is someone might say “you need to tighten your timings,” which would speed up how long it takes the memory to get ready so it doesn’t slow down the rest of the system.

Your RAM timings are actually numbers like 2-3-2-5 and refer to the number of ticks (CPU cycles) it takes for memory to get ready to do something on behalf of a request from the system. So we can deduce that timings play an important role in programs that need to access memory quickly in relationship to other system components. Can you guess what type of programs rely more on timings? Games are a big one! Your games have to move data quickly so you don’t get headshot in CS:S or taken down by a zombie in HL2. Timings obviously are not critical in programs that just sit there and crunch numbers. They play a role, but not as big as in games.

You’re probably wondering then why do I sometimes have to adjust my timings if Prime95 craps out since it just crunches numbers? The answer is simple: the researchers that wrote Prime95 developed some of their stress tests so that data would have to be moved quickly in and out of memory to test the stability of your system. You can’t do scientific research unless you have reliable data!

OK. Enough of this Prime95 talk. Let’s get on with RAM timings.

What happens when the CPU wants something from memory?

First, the chip set accesses the ROW of the memory matrix (remember our spreadsheet analogy) by putting an address on the memory's address pins and activating the RAS signal. Then, we have to wait a few clock cycles (known as RAS-to-CAS Delay). Then, the column address is put on the address pins, and the CAS signal is activated, to access the correct column of the memory matrix. Then, we wait a few clock cycles. This is what we all call CAS latency. Then the data magically appears on the pins of the RAM and hopefully you don’t plugged in the head.

CAS? RAS? What are those?

Now we get down to the meat of our discussion. Actually there are several different RAM timings that you can probably tweak in your BIOS, but 4 are really important and you’ll probably never mess with the others. If you do, then you’re geekier than the rest of us and probably have a very large head. That may be the reason you go down so much in CS:S and not because of your timings. Bigger target for headshots. Get it?

We refer to memory timings like 2-2-2-5. What does this mean? Well, these numbers are CAS Latency—RAS to CAS Delay—RAS Precharge—TRAS.

What? Don’t worry. We’ll talk about each one of these settings and explain precisely what they mean. Well maybe not precisely, but you’ll get the picture. Unless you’ve got one of those big heads, then you’ll probably just post corrections to my FAQ J.

CAS – Column Address Strobe

You’ll also see CAS referred to as CAS Latency, CAS Delay, or CL. CAS controls the timing delay (in clock cycles) before the RAM starts a read command after receiving it. CAS timings are usually 2, 2.5, or 3 for DDR and can be higher for DDR2. CAS latency has more affect on your system performance than any other RAM setting. Since this is the number of cycles the CAS needs to find the correct address of the data that it is looking for. That is why your system will run a little faster when the data can be fetched in 2 cycles rather than 2.5 or 3.

RAS to CAS Delay (RAS – Row Access Strobe)

You will sometimes see RAS to CAS Delay referred to as TRCD (time RAS CAS Delay). This timing is the number of CPU cycles between the CAS and RAS signals used when your RAM is written to, read from, or refreshed. Lower settings result in faster performance, but this setting is not as critical as CAS Delay. Typical settings for this are 2, 3, and 4 for DDR with similar values for DDR2 depending on what speed the RAM is set for.

RAS Precharge

RAS precharge is sometimes referred to as TRP (time RAS Precharge) and indicates how fast your RAM can terminate the access of one row and start accessing another. Typical settings for RAS precharge are similar to TRCD. TRP also affects performance, but like TRCD, it is not as critical as CAS Delay.

Active to Precharge

More commonly referred to as TRAS (you should have caught on by now that T is for time) and specifies the number of CPU cycles between getting a memory bank (our spreadsheet) ready for access and then closing it. TRAS generally affects system stability more than performance, but you should strive to run at the lowest number possible while remaining stable in your overclock. Typical values for TRAS are much higher than the others and range from 5 to 8 for decent DDR and from 8 to 12 for DDR2 depending on the speed used.

What about Command Rate?

Command Rate is sometimes referred to as DRC (DRAM command rate). This is the setting that selects the speed of your RAM signal controller. If it is set to 1T, then the controller will run in synchronization with your bus speed. Higher settings will result in slower overall RAM speed, which translates to less bandwith and yes (you guessed it) more headshots for you. Most decent RAM modules will run at 1T, but some have to be set to 2T. The moral of the story here is don’t buy value select RAM!

~Tweaking for Performance and Stability~

Ok, so you’ve overclocked your system and Prime95 ran for 14 minutes and crapped out. You’re already at max vcore, you’ve got an appropriate memory divider, and you’ve tweaked vdimm. What should you do? Adjust the timings!

Start by increasing TRAS. Go up to the max if you need to and if this solves your problem then you’re golden. If not, then try increasing TRCD and TRP. If that doesn’t work, then you may need to bump up your CAS Delay. Since there are 4 timings, you may need to experiment a little to find the right mix to get you through a 12 hour session of Prime95 . or at least 1 1/2 hours of Memtest

Don’t worry about the hype from the forum members yelling at you that you have bad RAM. You can benchmark before and after so you have numbers to see the difference.

Benchmarking

The proof is in the numbers. If you’re really concerned that loose timings will result in drastic performance decrease then you should bench before and after. You’ll probably find that there isn’t a big difference. Besides, what’s more important: a faster unstable system that will crash your game just before you deliver a head shot to melon head or a slightly (very slightly) slower system that lets you plug the bad guy?

Inspire

Nice FAQ!, Im likeing it. :)

demol1sh3d

thank you very much.

shortfuse

Where do u find time to make this write ups, between switching AVATARS lol... Thanks man i was actually looking for a write up abotu timings last night..

Bindusar

Good FAQ...puts a nice personal touch on the info in the article I posted awhile back. In the first paragraph you might want to change one "column" to "row"...

Quote: The memory controller will use the first 11 bits to reference the column and the last 11 bits to reference the column.

demol1sh3d

thanks edited.

demol1sh3d

just thought Id bumo this so people could see it again...thought it help.

Mr. Mumbles

Nice FAQ rep4u :)

demol1sh3d

im selfish I know...darn jewish religion.

SoFaKiNgHiGh

very nicly done dem!! rep 4 ya!!