miloshs

The following article was found at www.benchmark.rs and translated from Serbian to English by me (miloshs), photos are also taken from the forementioned website (further courtesy of Intel). For everyone wanting to see the photos in a larger scale please visit the link i supplied in the first sentence of this post. Hope you all find this very informative, as i did.





How It’s Made – Central Processing Unit (CPU)

In the following educational article, we will explain the making of not only the CPU waffer, but the CPU itself as a finished product. Each of the short textual comments refers to photographs right above the text.




Sand (left)
With roughly 25% saturation Silicium is one of the most common element found in the Earth crust. Sand, especially quartz sand, contains high percentage of Silicium in the form of Silicium dioxide (SiO2) which is the base in the making of semi-conductors.

Melted Silicium (middle) - scale:waffer size (~300mm)
Silicium is then purified through copule of stages so the quality for the production of semi-conductors can be achieved. Silicium purified like this is called “Electronic Grade Silicon”. Electronic Grade Silicon can contain maximum of one foreign particle in one billion Silicium particles. In the following photo, the creation of crystal out of the purified melted silicium is portrayed. These mono-crystals are callad Ingots.

Monocrystal Silicium Ingot (right) – scale: waffer size (~300mm)
Ingots are made out of electronic grade silicon, and each Ingot weights aproximately 100 kilograms and it contains 99,9999% silicium.


Cutting the Ingot (left) – scale:waffer size (~300mm)
Ingots are cut to individual silicium discs called Waffers.

Waffer (right) – scale: waffer size (~300mm)
Waffers are then polished until they are speckle free and until they get a mirror finish. Intel is supplied by pre-made waffers from different manufacturers, and for the andvanced 45nm High-K-Metal Gate uses waffers of 300mm in size. When Intel first started making electronic chips, electronic circuits were printed out on waffers 2 inches (~50.8mm) in size, now the company uses 300mm (~12 in) waffers wich significantly reduces manufacturing costs.



Application of photo-sensitive layer (left) – scale: waffer size (~300mm)
Blue colored liquid that’s poured onto the spinning waffer is actually a photo-sensitive layer, very much similar to the ones used in analog photography. During this process wafer is constantly spinning so a thin and equally dispersed layer could be achieved.

Exsposure (middle) – scale: waffer size (~300mm)
Photo-sensitive layer is then exposed to ultra-violet light. Chemical reaction happening at that time is very much similar to what happens with 35mm film in an analog photo camera when we press the shutter button. Photo-sensitive layer, exposed to UV light, changes its structure and becomes removable. Exposure to the UV light is done by using various masks that play the role of matrices. Together with the UV lights, matrices imprint different types of circular patterns in every layer of microprocessor.

Exposure (right) – scale: transistor size (~50nm)
Although several microprocessors are made on the same waffer, this picturesque guide will now focus on a small part of the CPU – the transistor or one of its parts. Transistors function like switches, controlling the flow of electric current in a computer chip. Intel's researchers have developed so tiny transistors that over 30 million of them can fit on a needle head.


Rinsing the photo-sensitive layer – scale: transistor size (~50nm)
Softened, gelationous part of the photo-sensitive layer is completely removed. This reveals the patterns left by the matrices on the photo-sensitive layer.

Carving (middle) – scale: transistor size (~50nm)
Photo-sensitive layer unexposed to UV light should not be removed by this process. In the area where the photo-sensitive layer was exposed to UV light, the designed pattern should be carved/revealed.

Partial removing the photo-sensitive layer (right) – scale: transistor size (~50nm)
After the carving the designed pattern is fully revealed.



Application of the photo-sensitive layer (left) – scale: transistor size (~50nm)
Applied photo-sensitive layer gets further rinsed for the next step of the process.

Ion implantation (middle) – scale: transistor size (~50nm)
Through the process called Ion implantation, exposed zone of the silicuim waffer is bombarded with different chemical mixtures (of particles) which are called Ions. Ions get implanted onto the silicium waffer, so its electirical conductivity in those areas gets changed. Ions are shot at the silicium waffer at near light speeds. Electrical field accelerates Ions to the speed of over 300.000km/h

Complete removal of the photo-sensitive layer (right) – scale: transistor size (~50nm)
After the Ion implementation, the photo-sensitive layer is finally removed, and the foreign particles are implanted onto the waffer (green color in the photo)



Finished transistor (left) – scale: transistor size (~50nm)
The fabrication of a single transistor is almost at an end. Three holes are kept to be filled with copper so two transistors can be joined together.

Electroforesis (middle) – scale: transistor size (~50nm)
Waffers are placed in a sulphour solution at this stage. Copper Ions are layed out onto the transistor in a process called electroforesis. Copper Ions travel from positively charged pole (anode) to the negatively charged pole (cathode – in this case, the waffer itself).

After the electroforesis (right) – scale: transistor size (~50nm)
The surface of the waffer is covered in a thin layer of copper.



Polishing (left) – scale: transistor size (~50nm)
Excess material is removed via polishing the waffer.

Metal layers (right) – scale: transistor size (6 transistors ~150nm)
Multi-layered applications of metal , are like wires, joining different transistors. The way these are merged was determined by designers and architects behind the functionality of the CPU iself ( ex. Intel Core i7 CPU). Althought CPU’s can seem really thin, they can have over 20 layers forming a very complex circuit. If you look at a magnified CPU, you can actually see the lines, circuits and transistors which look like a futuristic system of highways.



Sorting the waffers (left) – scale (~40nm)
This part of the completed waffer is put to the first functional test. At this stage, each chip is individually tested and the answer the chip returns is compared to previously determined “right answer”.

Cutting the waffer (middle) – scale: waffer size (~300mm)
The waffer is is then cut out to cubes called dies.

Dicarding the faulty dies – scale: waffer size (~300mm)
The dies that proveded the right answer in the functionality test proceed to the next step (packaging) while the rest of them are discarded.



Individual die (left) – scale: die size (~20mm)
Portrayed is the photo of a finished die which was produced by cutting and all the steps described before.

Packaging (middle) – scale: packaging size (~40mm)
CPU heatsink, die and the bottom layer are combined together in order to form the whole CPU. Green layer represents electrical and mechanical contact through wich the CPU will communicate to the rest of the computer system. The silver colored heatsink at the top represents a thermal contact for the actual cooling device. It will help cool the CPU while powered up and running.

CPU (right) – scale: packaging size (~40mm)
Finished product. The microprocessor (CPU) is the most complex product made on Earth. It is actually made by following hundreds and hundreds of steps, and all that in the cleaniest possible surroundings (microprocessor factory). This guide portrayed only the most important steps in making a microprocessor.



Testing and determining the class (left) – scale: package size
During the final testing, CPU's are tested so the key characteristics can be determined (such as voltage and /or maximum frequency it runs at).

Grouping (middle) – scale: package size
Based on the final tests, CPU's of similar characteristics are grouped and packaged together in their transport bins.

Retail packaging (right) – scale: package size
Once assembled and tested, CPU's are then shipped to the retailers or hardware shops , packaged in already recogizeable boxes.

miloshs over and out, and thanks for reading.

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bk7794

awesome!!!!

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E5200

Q9550
1Ghz overclock club

Bellatrix

Nice thread.

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I think I belong @ The Coolermaster Cosmos Club.

Still awaiting my Network card.

Rick Arter

Great thread rep+.

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justinjja

I would love to see one of these on the discovery channel.

l4n b0y

very nice read.

+rep

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My custom built i7 Tech Bench!

Eastrider

I came.

OH! It means now I can make my own homemade i7! :P


I think there is one...

om3n

This is awesome. Those pictures make it so much easier to understand

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miloshs

Thanks guys, took me well 2h to translate and do the photos and everything, but i don't regret it. I hope this is something most of you didn't know before...

Tnx for the reps..

Maybe this could go sitcky?!

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slothfish

Awesome! +rep

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