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can't stable i7 920 @ 4.0 - Page 2

post #11 of 58
Lol, so pretty much exactly what I said except I'd disagree with them about raising the PLL to 1.96, leaving it at stock (1.8v-1.82v) will be fine for 4Ghz
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post #12 of 58
Large FFT's stress the memory a lot more than the blend test. Besides turning off all the power-saving features (speedstep, turbo, c1e, etc) I would reduce your DRAM frequency.

A good test to run is Hyper-PI. It really stresses the memory and CPU and does it in 15-30min instead of hours of Prime. It's a quick way to know if your OC is somewhat stable. If it passes Hyper-PI, then you can run Prime or OCCT for a couple hours to be sure.

edit:
I agree with the above post, I don't think that you need to put your PLL at 1.96....... leave it at 1.80v. Raising your voltages too high will cause you to run hotter. What is the ambient temp, BTW
Edited by hollywood406 - 5/1/11 at 8:42pm
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post #13 of 58
Thread Starter 
Quote:
Originally Posted by hollywood406 View Post
Large FFT's stress the memory a lot more than the blend test. Besides turning off all the power-saving features (speedstep, turbo, c1e, etc) I would reduce your DRAM frequency.

A good test to run is Hyper-PI. It really stresses the memory and CPU and does it in 15-30min instead of hours of Prime. It's a quick way to know if your OC is somewhat stable. If it passes Hyper-PI, then you can run Prime or OCCT for a couple hours to be sure.

edit:
I agree with the above post, I don't think that you need to put your PLL at 1.96....... leave it at 1.80v. Raising your voltages too high will cause you to run hotter. What is the ambient temp, BTW
idle is around 35-40ish. How do u set up your Hyper PI? I just ran it on default setting and froze on the 17th loop, lol


edit:
current setup:
SS and Turbo are disabled,
Ratio is Auto
BCLK 191
PCIE 100
DRAM 1531
cpu volt 1.35
cpu pll 1.8
qpi/dram 1.35
Edited by Phoenix777 - 5/1/11 at 8:46pm
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post #14 of 58
Quote:
Originally Posted by Phoenix777 View Post
idle is around 35-40ish. How do u set up your Hyper PI? I just ran it on default setting and froze on the 17th loop, lol
hmm if your freezing on stock setting something might not be right.

I would check your PSU to see if its running right
 
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post #15 of 58
I had 35-40ish on air, with water you should be at least down in the low 30s. Can you post a pic of your WC loop setup? I think there's bigger issues here
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post #16 of 58
Here is a templete for your settings. Just fill out what you have set. Thanks.

Code:
Target CPU Frequency                  XXXXMHz
Target DRAM Frequency                 XXXXMHz

LN2 Mode                              []***
QPI Loadline Calibration              []***

Sync Mode                             []
AI Overclock Tuner                    []
OC From CPU level Up                  []
CPU Ratio Setting                     []
CPU Turbo Power Limit                 []

>CPU Configuration----------------------------
CPU Ratio Setting                     []
C1E Support                           []
Hardware Prefetcher                   []
Adjacent Cache Line Prefetcher        []
Intel(R) Virtualiyation Tech          []
CPU TM Function                       []
Execute Disable Bit                   []
Intel(R) HT Technology                []
Active Processor Cores                []
A20M                                  []
Intel(R) SpeedStep(TM) Tech           []
Intel(R) C-STATE Tech                 []
C State package limit setting         []
----------------------------------------------

BCLK Frequency                        []
PCIE Frequency                        []
DRAM Frequency                        []
UCLK Frequency                        []
QPI Link Data Rate                    []

Memory Configuration Protect          []

>DRAM Timing Control--------------------------
CAS# Latency                          []
RAS# to CAS# Delay                    []
RAS# PRE Time                         []
RAS# ACT Time                         []
RAS# to RAS# Delay                    []
REF Cycle Time                        []
WRITE Recovery Time                   []
READ to PRE Time                      []
FOUR ACT WIN Time                     []
Back-To-BackCAS# Delay                []

Timing Mode                           []
Round Trip Latency on CHA             []
Round Trip Latency on CHB             []
Round Trip Latency on CHC             []

WRITE To READ Delay(DD)               []
WRITE To READ Delay(DR)               []
WRITE To READ Delay(SR)               []
READ To WRITE Delay(DD)               []
READ To WRITE Delay(DR)               []
READ To WRITE Delay(SR)               []
READ To READ Delay(DD)                []
READ To READ Delay(DR)                []
READ To READ Delay(SR)                []
WRITE To WRITE Delay(DD)              []
WRITE To WRITE Delay(DR)              []
WRITE To WRITE Delay(SR)              []
----------------------------------------------

CPU Differential Amplitude            []
CPU Clock Skew                        []
IOH Clock Skew                        []
------------ Extreme Engine Digi+ ------------
Digi+ PWR Mode                        []
PWR Volt. Control                     []
Load-Line Calibration                 []
CPU Voltege OCP                       []
CPU PWM Frequency                     []

Extreme OV                            []
Extreme OC                            []

CPU Voltage                           []
CPU PLL Voltage                       []
QPI/DRAM Core Voltage                 []
DRAM Bus Voltage                      []

>DRAM REF Voltages----------------------------
DRAM DATA REF Voltage on CHA          []
DRAM CTRL REF Voltage on CHA          []
DRAM DATA REF Voltage on CHB          []
DRAM CTRL REF Voltage on CHB          []
DRAM DATA REF Voltage on CHC          []
DRAM CTRL REF Voltage on CHC          []
----------------------------------------------

IOH Voltage                           []
IOH PCIE Voltage                      []

ICH Voltage                           []
ICH PCIE Voltage                      []

---------- Spread Spectrum Control -----------
CPU Spread Spectrum                   []
DRAM Spread Spectrum                  []

***on-board jumper dependant
post #17 of 58
Thread Starter 
Quote:
Originally Posted by S0ULphIRE View Post
I had 35-40ish on air, with water you should be at least down in the low 30s. Can you post a pic of your WC loop setup? I think there's bigger issues here
o crap really? I thought Im getting good temps.

hang on, ill check and get some photos.
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post #18 of 58
Thread Starter 
ok I managed the 1M test for Hyper PI, died on the 2M test.
My PC, loop order, parts, ect.
http://i.imgur.com/sP1sj.jpg
idle at 48C~ (because power saving is turned off, i think)
edit: mcp355 pump and XSPC res/pump top combo.

Current setup:

Target CPU Frequency 4.0 GHz
Target DRAM Frequency 1600 MHz

LN2 Mode []***
QPI Loadline Calibration [Enabled]***

Sync Mode []
AI Overclock Tuner []
OC From CPU level Up []
CPU Ratio Setting []
CPU Turbo Power Limit []

>CPU Configuration----------------------------
CPU Ratio Setting [20]
C1E Support []
Hardware Prefetcher []
Adjacent Cache Line Prefetcher []
Intel(R) Virtualiyation Tech []
CPU TM Function []
Execute Disable Bit []
Intel(R) HT Technology []
Active Processor Cores []
A20M []
Intel(R) SpeedStep(TM) Tech [Disabled]
Intel(R) C-STATE Tech []
C State package limit setting []
----------------------------------------------

BCLK Frequency [200]
PCIE Frequency [100]
DRAM Frequency [1603]
UCLK Frequency [auto]
QPI Link Data Rate [auto]

Memory Configuration Protect []

>DRAM Timing Control--------------------------
CAS# Latency [8]
RAS# to CAS# Delay [8]
RAS# PRE Time [8]
RAS# ACT Time [24]
RAS# to RAS# Delay []
REF Cycle Time []
WRITE Recovery Time []
READ to PRE Time []
FOUR ACT WIN Time []
Back-To-BackCAS# Delay []

Timing Mode []
Round Trip Latency on CHA []
Round Trip Latency on CHB []
Round Trip Latency on CHC []

WRITE To READ Delay(DD) []
WRITE To READ Delay(DR) []
WRITE To READ Delay(SR) []
READ To WRITE Delay(DD) []
READ To WRITE Delay(DR) []
READ To WRITE Delay(SR) []
READ To READ Delay(DD) []
READ To READ Delay(DR) []
READ To READ Delay(SR) []
WRITE To WRITE Delay(DD) []
WRITE To WRITE Delay(DR) []
WRITE To WRITE Delay(SR) []
----------------------------------------------

CPU Differential Amplitude []
CPU Clock Skew []
IOH Clock Skew []
------------ Extreme Engine Digi+ ------------
Digi+ PWR Mode []
PWR Volt. Control []
Load-Line Calibration []
CPU Voltege OCP []
CPU PWM Frequency []

Extreme OV []
Extreme OC []

CPU Voltage [1.35]
CPU PLL Voltage [1.8]
QPI/DRAM Core Voltage [1.35]
DRAM Bus Voltage [1.66]

>DRAM REF Voltages----------------------------
DRAM DATA REF Voltage on CHA []
DRAM CTRL REF Voltage on CHA []
DRAM DATA REF Voltage on CHB []
DRAM CTRL REF Voltage on CHB []
DRAM DATA REF Voltage on CHC []
DRAM CTRL REF Voltage on CHC []
----------------------------------------------

IOH Voltage []
IOH PCIE Voltage []

ICH Voltage []
ICH PCIE Voltage []

---------- Spread Spectrum Control -----------
CPU Spread Spectrum []
DRAM Spread Spectrum []

***on-board jumper dependant
Edited by Phoenix777 - 5/1/11 at 9:15pm
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post #19 of 58
Are you using realtemp to watch your temps when it is running? Grab it and let it show while you are testing.
http://us1-dl.techpowerup.com//SysIn...alTemp_360.zip
post #20 of 58
Ok for a start, with your wc loop, the pump shouldn't be pulling water up towards itself, it should be pushing it out. E.g. Have the pump intake at the bottom of a tube, so gravity is pulling the water towards it already. Less strain for the pump.

For the future, these should be:
UCLK Frequency [3200]
QPI Link Data Rate [highest] (not sure off the top of my head, think it's gonna be ~7200?).

Apart from that though, everything looks fine. Which is bad, because your temps are definitely bad.
Set everything to stock, then post up your idle/load temps. 133 bclk, 20x multi, 1600mhz ram, 6400 QPI data rate, 3200 UCLK Freq, 1.25v vcore, keep qpi/dram at 1.3v, keep dram at 1.66.
Edited by S0ULphIRE - 5/1/11 at 9:21pm
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