Originally Posted by moldyviolinist
You're a little late... This thread is two years old.
To answer your question, a FinFET (tri-gate transistor) surrounds the entire channel with the gate material. This (in theory) should mean much less leakage current. Leakage current is the current between the transistor and the substrate, and as long as there is power to the transistor, there will be leakage current. This in turn reduces power consumption. FinFETs have worked quite well for Intel it seems, as Ivy Bridge has considerably lower power consumption than previous generations. However, they are considerably more difficult to manufacture than planar transistors, which is probably why everyone isn't using them yet. There are other options to do effectively the same thing in a transistor, so perhaps research has gone into those areas.
Cool! but i forgot to check the date on this thread, i'm late to the party because i'm just now looking into logic gates, CPU architecture and transistors and reading everything i can about them, 3d transistors sounded new so i took a bite, it seems that i have necro'd 2 threads in the span of 10min sorry all!