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Bulldozer Questions from an Intel User. - Page 2

post #11 of 162
Quote:
Originally Posted by BallaTheFeared View Post
No its not, its like 80% of a real core, per core. The FP part of the chip is shared, as well as the some levels of cache, and a few other things.
Wrong.

They're still "real cores". The point you're attempting to make is that when both cores in a module are working, one of them, due to resource sharing, will lose ~20% performance of a core not sharing resources.

If only one core in a module is working, it will have 100% of it's capability available. JF has gone over all of this if you wish to find out more, you were probably too infatuated with SB and GPU bottlenecks at the time to notice.


Quote:
Originally Posted by BallaTheFeared View Post
Each core has its own 128 bit FP unit, however they can combine to create one 256 bit FPU unit. So the 8 core (4 modules) chip will have 8 128 bit FP units, that can combine as needed to have 4 256 bit FP units.
Correct!
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post #12 of 162
Quote:
Originally Posted by purpleannex View Post
you were probably too infatuated with SB and GPU bottlenecks at the time to notice.
How are they real cores if they operate at diminished capacity?

I have 4 real cores.

A 4 "core" bulldozer will not have 4 real cores in the same sense as I have 4 real cores.

Its still a SMT design, they aren't true cores in the sense that we've defined cores since the first microprocessor.

I'm fully aware of what JF said, and I'm fully aware that he got stupid with me when I asked him what AMD was going to do about Windows thread spreading, which in essence means you'll almost never get 100% capacity from your bulldozer cpu even if you're running a single threaded program like super PI because windows will spread that thread over all the cores. He also blew up on me when I explained why turbo failed to work on SB because of the same issue.
    
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post #13 of 162
Come off it balla, you know what jf said. its 8 real cores.
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post #14 of 162
AMD is doing something like HTT for Intel. Expect AMD is using a physical core not the FPU. But it still has 8 physical cores and 8 FPU. This is the best way I can explain the new BD chip.
Edited by dixson01974 - 5/23/11 at 8:50pm
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post #15 of 162
Intel doesn't HT the FPU. You can see that clearly when HT is enabled i7's score lower in benchmarks like LinX than with it disabled.
    
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post #16 of 162
Quote:
Originally Posted by BallaTheFeared View Post
Intel doesn't HT the FPU. You can see that clearly when HT is enabled i7's score lower in benchmarks like LinX than with it disabled.
HTT is the FPU. I guess you need to read up on HTT.
Edited by dixson01974 - 5/23/11 at 8:50pm
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post #17 of 162
Quote:
Originally Posted by Anthraxinsoup View Post
You don't know that at all.
It has actually been known for some time that they are releasing multiple-socket variations of Bulldozer for C32 (up to 8-cores per CPU) and G34 (up to 16-cores per CPU) which will be released a little bit after the consumer level chips.

Quote:
Originally Posted by dixson01974 View Post
Ht is the FPU. I guess you need to read up on HT.
It's actually HTT, HT is HyperTransport. Okay, I am nitpicking.
Edited by dodger.blue - 5/23/11 at 8:48pm
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post #18 of 162
Quote:
Originally Posted by dodger.blue View Post
It's actually HTT, HT is HyperTransport. Okay, I am nitpicking.
Thank you for correcting me on that and I fix it.
C32 is for consumers and the G34 is for servers.
Edited by dixson01974 - 5/23/11 at 8:54pm
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post #19 of 162
Quote:
Originally Posted by dixson01974 View Post
HTT is the FPU. I guess you need to read up on HTT.
Really?

Can you produce a document that supports your claim?

Because as far as I know HHT will hinder FPU performance.

I don't understand how you can claim HTT IS the FPU, when your chip has a FPU but you don't have HTT. Neither does mine, but I can still run linpacks.
    
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post #20 of 162
The way Intel makes HTT is that is uses half of the FPU for heavy threading apps.
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