Originally Posted by AliceInChains
Yea me too. I always use offset, that way my voltage drops when idle. I have yet to experience instability during idle.
You know what I think is happening? I think the people who are experiencing idle instabilities supposedly caused by cstates, are actually just unstable overclocks period. I think they either didnt stress test long enough to get a bsod, or they thought they were completely stable and in actuallity are not.
Not to sound rude or anything, Im no expert on sandy bridge. However, I do have the basic experience needed to know that offset does not cause instability when used in conjunction with cstates.
If you have instability during idle then your overclock is unstable, period. It is not because of speed step, or any of the c-states. Its unstable, period.
Please read the thread on HardOCP.
There's a MASSIVE thread on idle BSOD's when using offsets, on the P8P boards. Many of these BSOD's were fixed by DISABLING C3/C6. It's nothing to do with being unstable naturally. Other people were having freezes (instead of BSOD) at idle, but that had to do with XMP and RAM issues.
So yeah..it helps some people..
I'm still testing it...trying to use only C1E (EIST and C1E do the same thing btw...C1E is forced through hardware while EIST is forced through the OS itself, and is controlled by power options, while C1E is NOT controlled by power options. I honestly do nOT know what C3 and C6 do, anyway, nor do I care....
And, Alex and lethalrise,
You two really need to stop flaming me. I read forums religiously and I followed that C3/C6 freeze thread on HardOCP for months. Do you actually think I made up that thread and made up all the posters who are having problems, claiming its from my imagination? Seriously--you guys have more experience in computers than this--you should know better than to insult somebody just because YOUR system is working fine. If YOURS works fine and C3/C6 works great, then great!! awesome!! But just because you don't have problems does NOT mean that someone else with the same board won't have a problem !!! I would have thought you experienced builders would know this by now.
That's about as silly as saying "degradation doesn't exist: I ran my CPU at 1.5v for 3 months and it's STILL stable at 1.5v"--haven't you heard of the "bandwagon fallicy? (aka hasty generalization)" They teach that in college, you know....
BTW you know that C3/C6 states have to do with complete core shutoffs for power saving (just found this out), and aren't required to have your downclocking to 1.6 ghz and vcore down to 1.1v...really no need to save 10 cents a month on your electric bill by using C3/C6...especially if it causes a problem on someone else's system....
C3, C6. This is a deeper sleep with a complete core(s) shut down (Gate off) and no voltage/Data at all. harder to recover from quickly, previous data is cached elsewhere and needs to be re-cached in L3 memory
to re initialize full muliticore, multithread use. Part of Core parking
Now I can FULLY see why some people may have idle BSOD's with C3/C6 ...
And that also explained the weird "lag" I had when starting superpi when I had them enabled too (Only the first time).
No need to bother using C3/C6. It doesn't affect downclocking at all and doesn't affect EIST (controlled by OS) or C1E (controlled by hardware, not by OS). And enabling it (which crashes you) may save you a dime a month on electricity. Big whoop...
*edit* I was partially wrong earlier, as the problem isnt with offset voltages but with C3/C6. I incorrectly mixed them up and assumed C3/C6 were part of making offsets work with downclocking and you only need C1E (OR eist) for that, so my bad, there.Edited by Falkentyne - 5/26/11 at 5:38am