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45 nm vs 32 nm

post #1 of 25
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Should 32 nm be faster than 45 nm.I think so ye? So i figure out they we cannot put a phenom 2 agains a i7 in benches! With BD AMD is finnaly comming to the party with 32 nm.But now for the interisting part.How the hell did AMD get it right still to use socket 939/940 and intel have to go from 775 to 1366 and now 1156/55.(Not talking about the APU here.It will have a bigger socket because of the graphic interface)
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post #2 of 25
Quote:
Originally Posted by bossie2000;13655145 
Should 32 nm be faster than 45 nm.I think so ye? So i figure out they we cannot put a phenom 2 agains a i7 in benches! With BD AMD is finnaly comming to the party with 32 nm.But now for the interisting part.How the hell did AMD get it right still to use socket 939/940 and intel have to go from 775 to 1366 and now 1156/55.(Not talking about the APU here.It will have a bigger socket because of the graphic interface)

Socket 939? They're on AM3 (AM3+ for BD) socket now. What do you mean get it right? What's your point?
post #3 of 25
32nm doesn't mean faster at all, the new arch means that.
    
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post #4 of 25
Quote:
Originally Posted by Anthraxinsoup;13656472 
32nm doesn't mean faster at all, the new arch means that.

This exactly, although with smaller process like 32nm, you can fit much more transistors in same sized area as 45nm.
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post #5 of 25
Quote:
Originally Posted by Devilmaypoop;13659376 
This exactly, although with smaller process like 32nm, you can fit much more transistors in same sized area as 45nm.

Also generally means less heat and less power, but not always true.
    
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post #6 of 25
Quote:
Originally Posted by Anthraxinsoup;13660267 
Also generally means less heat and less power, but not always true.


would the physical property of a material change just from going smaller ???


i doubt it ... but with different manufacturing methods or different materials being used in different method of integration is the way to get lower voltage requirement id guess
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post #7 of 25
Quote:
Originally Posted by Fr0sty;13660404 
would the physical property of a material change just from going smaller ???


i doubt it ... but with different manufacturing methods or different materials being used in different method of integration is the way to get lower voltage requirement id guess

No, not most of the time. Now sometimes they will, but not generally. 3d trans in the 22nm Ivy bridge is going to change the method though.
    
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post #8 of 25
32nm will always be faster than 45nm, theoretically. Light takes a set amount of seconds to travel a distance of 45nm. It'll take light 71.1% the time it took to travel 32nm as compared to 45nm, so the smaller the nanometers, the faster the computations will be.

This isn't counting architecture though.
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post #9 of 25
Well if AMD made a Phenom II x 6 in a 32nm. Does the make the chip faster, no. It just means that you can oc it a little higher. Do to the fact of less heat and less voltage you need to run it. The smaller the nm the less voltage you need to run it.
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post #10 of 25
Quote:
Originally Posted by Ipwnnubletz;13660847 
32nm will always be faster than 45nm, theoretically. Light takes a set amount of seconds to travel a distance of 45nm. It'll take light 71.1% the time it took to travel 32nm as compared to 45nm, so the smaller the nanometers, the faster the computations will be.

This isn't counting architecture though.

Light? These aren't fiber optics. Electrons transfer through a medium nearly instantaneously despite distances small or vast because, unlike light, they don't actually travel. They simply cause their neighbors to get excited and pass on the urge, so to speak.

More transistors.
Quote:
Originally Posted by wiki 
This reduces overall costs of a chip firm as the lack of major architectural changes of the processor designed, reducing the R&D cost, while at the same time allowing more processor dies to be manufactured on the same piece of silicon wafer, resulting in more revenues as per more products sold....

Die shrink is beneficial to end users as well, as shrinking a die reduces the current leakage in semiconductor devices while maintaining the same clock frequency of a chip, making a product with less power consumption, increased clock rate headroom, and lower prices.
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