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Bulldozer Live testing in China - Page 19

post #181 of 275
Quote:
Originally Posted by BallaTheFeared View Post
Yeah it's easy to hold it up on a pedestal when you don't know either.


If its a true 8 core chip why is it sharing resources?

And Intel chips with HT share resources, they share entire cores.
You do not want to debate this with me. I suggest you need to actually look at the architecture and read about it. It is shared through the little cores whispering to each other.

http://techreport.com/articles.x/19514

Intel virtual cores DO not share resources in hyperthreading. Read up. Educate yourself.
Edited by PureOC Jim - 6/9/11 at 3:38pm
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post #182 of 275
Quote:
Originally Posted by BallaTheFeared View Post
I have no idea why D2 made retail, maybe it had something to do on the chip level. However D1 (afaik) was better for overclocking than D2. D2 requires internal PPL overvoltage, D1 didn't.
You are talking about stepping D mate ,where are the other steppings ?!
Show me a benchmark with stepping B for the Intel SB.
You don t have one do you ?!
AMD has not released any sample to the public with this B0 revision (nor did Intel).
Even not answering it s an answer.

Quote:
Originally Posted by BallaTheFeared View Post

Maybe I should take a break, it seems no new information is coming out anyways and all we're hearing now is why its requiring 8 cores to match 4 without HT.
LOL !
Edited by Dromihetes - 6/9/11 at 3:51pm
   
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post #183 of 275
Ouch, looks like a failure already.
    
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post #184 of 275
Quote:
Originally Posted by Dromihetes View Post
You are talking about stepping D mate ,where are the other steppings ?!
Show me a benchmark with stepping B for the Intel SB.
You don t have one do you ?!
AMD has not released any sample to the public with this B0 revision (nor did Intel).
Even not answering it s an answer.
It's not worth it brother. He is shooting from the hip.
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post #185 of 275
Quote:
Originally Posted by PureOC Jim View Post
Your entirely wrong. Bulldozer has been redesigned while sharing some K10 features, the die was drunk but the cores actually share the resources within the chip and are true x6 and x8 cores. Intels architecture is not true 8 cores and do not share the resources. Bulldozer will be more efficient due to the OS can now designate the assignment to 1 core instead of multiple cores. This architecture is more ground breaking than you think. It is easy to make a blanket statement without understanding how a CPU works.
lulz and without getting too much into it my statement stands
post #186 of 275
Quote:
Originally Posted by Dromihetes View Post
You are talking about stepping D mate ,where are the other steppings ?!
Show me a benchmark with stepping B for the Intel SB.
You don t have one do you ?!
AMD has not released any sample to the public with this B0 revision (nor did Intel).
Even not answering it s an answer.



LOL !
For what it's worth, the best Intel 980X chips are the ES A0 chips with a stock clock of 2.4GHz. The current stepping is B1.

The fact is, I (we?) don't know all of the internal stepping and how they name/number them. For all we know, this could only be the second piece of silicon (assuming there was an A stepping) or it could be the tenth.

Regardless, there's something wrong with this chip. I don't think any company with a CEO would release such a failure
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post #187 of 275
Hopefully they will be a bit better and more refined than that by the time of there release date.
post #188 of 275
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post #189 of 275
THe ES sample that they are testing cache is not writing. Review the AIDA memory test results. Confirmed also by testers in post #789 from that the cache can not write.
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post #190 of 275
Here we go again guys. View count is zero, I am first viewer... will report on what I see

EDIT: Disappointing cinebench it seems, for some reason........
I highly doubt AMD would release something like this. Then again, it is a B0 stepping (performance issues).... and they aren't releasing B0s.
Edited by xd_1771 - 6/9/11 at 10:19pm
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