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[WCCF]AMD Bulldozer Launch in September Now Official, Two New 8 Core FX Processors... - Page 11  

post #101 of 244
Quote:
Originally Posted by wolf_08 View Post
AMD I wish you luck for the first Archietcure change since Phenom Athlon 64
Fixed.
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post #102 of 244
Quote:
Originally Posted by hazarada View Post
heres a question tho - if there is a turbo that will increase the clock speed no matter how many cores are active (lets say 100 for all cores 200 for one core for example) then what is the point of stock clock if the cpu will literally never use it? i mean at all times the cores are either clocked way down when idle or clocked up with turbo so... why not make the minimal turbo speed the new stock to avoid confusion and all that
BINNING!!!




yes not all chips are made the same ... some are more perfect ... some are worse but will pass a certain criteria so they end up as lower end model ....
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post #103 of 244
Quote:
Originally Posted by hazarada View Post
heres a question tho - if there is a turbo that will increase the clock speed no matter how many cores are active (lets say 100 for all cores 200 for one core for example) then what is the point of stock clock if the cpu will literally never use it? i mean at all times the cores are either clocked way down when idle or clocked up with turbo so... why not make the minimal turbo speed the new stock to avoid confusion and all that
Because it depends on the workload.

For example, if you run prime/linpack then all the transistors are being taxed. You need power for all those transistors so at the base frequency you will hit TDP. Thus, TC2.0 will do nothing since TDP is the limit.

However, lets say you have 8 file transfers going. In this case, all cores are being used, but all the transistors in each core are not being used. Since you have less transistors to power you will be under TDP. In that case, even though all cores are in use TC2.0 will boast the clock speed.

In summary, just because all cores are in use doesn't mean all parts (i.e every transistor) of the CPU is in use. For example, heavy integer workloads mean the FPU is basically idle. All TC2.0 does is figure out how much power headroom you have for given case and boost accordingly. Also, it can shutdown cores and boost even further.

Hope that helps.
post #104 of 244
Quote:
Originally Posted by Homeles View Post
Whoever said it was calendar year quarters?
Whats the alternative?
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post #105 of 244
Quote:
Originally Posted by Armand Hammer View Post
Whats the alternative?
tax calender year i supose or something along the line
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post #106 of 244
why does it limit power

can it be disabled for proper OCing like turning off CnQ in ASUS BIOS
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post #107 of 244
Quote:
Originally Posted by Mit Namso View Post
why does it limit power

can it be disabled for proper OCing like turning off CnQ in ASUS BIOS
most likely yes


and it doesnt limit actually .. it redirects the tdp into other widely used part of the cpu to be exact ... improving the efficiency
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post #108 of 244
Quote:
Originally Posted by Mit Namso View Post
why does it limit power

can it be disabled for proper OCing like turning off CnQ in ASUS BIOS
ignore power limiting posts all BD threads r ruined by sandy users every time :'(
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post #109 of 244
Quote:
Originally Posted by sunnyFTW View Post
ignore power limiting posts all BD threads r ruined by sandy users every time :'(
And people talking about Ivy Bridge and their Tri-gate 22nm SOI? fab

Old news but should be significant now

Tri-gate Sub-30nm FD-SOI

http://www.internetnews.com/infra/ar...eGate+Race.htm
Dated: September 19, 2003(September 19th where did I hear that before)

Now we wait for GlobalFoundries & AMD to announce it for NG Bulldozer
(And it works, 2012 Tri-gate for Intel, 2013 Tri-gate for AMD since AMD was 1 year late announcing this)

I probably blew away so many brains with this
Edited by Seronx - 7/24/11 at 12:30am
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post #110 of 244
Why B2, what about the C0 Stepping?
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