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post #41 of 45
I don't really understand how this would save a significant amount of power.
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post #42 of 45
Quote:
Originally Posted by Homeles View Post
I don't really understand how this would save a significant amount of power.
Instead of the a module having to communicate with a component on the other side of the die, the entire chip could be 3D and components closer together. Shorter wires and less distance means less leakage... less power.
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post #43 of 45
How big of a problem is leakage in say, your average desktop? Say I draw 100w from the wall, how much of those 100w is lost due to leakage in wires? Would you have a decent guess? Not talking about leakage on the transistor level.
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post #44 of 45
Quote:
Originally Posted by Homeles View Post
How big of a problem is leakage in say, your average desktop? Say I draw 100w from the wall, how much of those 100w is lost due to leakage in wires? Would you have a decent guess? Not talking about leakage on the transistor level.
...are you talking about the CPU level or system level?


If you're drawing 100w from the wall, your PSU already is wasting 10-20w.

There's line resistance from the PSU to mobo. Then there are VRM inefficiencies. Then there's the CPU.
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post #45 of 45
System level.
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