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[AMD] Get Your Rig Ready for the AMD FX Processor - Page 13

post #121 of 401
Quote:
Originally Posted by MaCk-AtTaCk View Post
so basically your saying BD on par with 2600k?
In most areas yes

Quote:
Originally Posted by MaCk-AtTaCk View Post
since a 2600k single thread is about the same as a 2500k single thread correct?...
the 2600K can have single thread performance below that of the 2500K

Quote:
Originally Posted by MaCk-AtTaCk View Post
its just that 2600k has hyper threading?
Which increases core amount logically, AMD FX has physical cores that equate to the same amount as the i7 2600K

Quote:
Originally Posted by MaCk-AtTaCk View Post
Also just what have you "seen" that makes you believe this?
Couple benchmarks



The one without the DH logo is the real one 7zip shows IPS(Millions of instructions per second is the same)

Quote:
Originally Posted by MaCk-AtTaCk View Post
every supposed leaked bench iv seen show it much slower then the 2500k in single, even worse than 1100t?


A GPU limited benchmark shows the CPU being baus

Quote:
Originally Posted by MaCk-AtTaCk View Post
Not trying to dis, just curious is all.
I find things faster than most

Intel i7 2600K/2700K/3820 should equal AMD FX-8150 in most cases
Edited by Seronx - 10/7/11 at 4:34pm
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post #122 of 401
i see...
well hopfully bd will be good. I just wish that 990fx had pci-e 3.0 for better future proofing.
    
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post #123 of 401
Senronx, so you think the CineBench leaks are fake/using old AGESA?

IPC looks very poor in single threads with CB 10 in those review leaks for the 8150.
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post #124 of 401
Quote:
Originally Posted by SSJVegeta View Post
Senronx, so you think the CineBench leaks are fake/using old AGESA?

IPC looks very poor in single threads with CB 10 in those review leaks for the 8150.
That isn't IPC that is OPC

Operations per Cycle only 2 128bit FMA can occur where in Phenom II 2 core 4 128bit FADD+FMULs can occur

Notice 2 128bit FMA(that can mimic 2 FADDs or 2 FMULs per cycle) or 4 128bit FADD+FMULs(2 FADDs per 2 core 2 FMULs per 2 core)

Cinebench is purely coprocessor floating point limited in SB and FX

AMD FX
Core 0 -> 1 FADD+1 FMUL then the next cycle occurs
Core 1 -> 1 FADD+1 FMUL then so on and so on
Intel i7
LCore 0 -> 1 FADD+1 FMUL then the next cylce occurs
LCore 1 -> 1 FADD+1 FMUL then so on and so on
AMD Phenom II
Core 0 -> 1 FADD+1 FMUL + Core 1 -> 1 FADD+1 FMUL then the next cycle occurs
Core 0 -> 1 FADD+1 FMUL + Core 1 -> 1 FADD+1 FMUL then so on and so on
Intel i5
Core 0 -> 1 FADD+1 FMUL + Core 1 -> 1 FADD+1 FMUL then the next cycle occurs
Core 0 -> 1 FADD+1 FMUL + Core 1 -> 1 FADD+1 FMUL then so on and so on
Edited by Seronx - 10/7/11 at 5:10pm
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post #125 of 401
so why does the 2600k score so much better?
    
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post #126 of 401
Quote:
Originally Posted by MaCk-AtTaCk View Post
so why does the 2600k score so much better?
Cinebench is optimized for Intel CPUs

It won't show representative performance for AMD CPUs
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post #127 of 401
thats not true , all it does is measure the cpu's performance .. doesnt mater what cpu it is .
    
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post #128 of 401
On another note, why use c10 in the first place, since 11.5 is supposedly better anyway. Its like saying 3dmark 2006 is biased to intel systems, yeah maybe but who cares. What we need are open source benches using vendor agnostic compilers. Someone make it happen please.
Edited by qwertymac93 - 10/7/11 at 6:05pm
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post #129 of 401
Quote:
Originally Posted by Xristo View Post
thats not true , all it does is measure the cpu's performance .. doesnt mater what cpu it is .
Cinebench

AMD FX CPUs -> SSE2
AMD Phenom II -> SSE2
Intel Core 2(45nm) -> SSE4.1
Intel i7 1st gen(45nm/32nm) -> SSE4.2
Intel i7 2nd gen(32nm) -> AVX

It does matter what CPU is used when the compiler is racist

Intel Compiler check for Genuine Intel in all versions if it isn't an Intel CPU it forces the OS/CPU to use SSE2 instead which takes extra time to convert ISA instructions to legacy ISA instructions
Edited by Seronx - 10/7/11 at 5:29pm
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post #130 of 401
Quote:
Originally Posted by Heavy MG View Post
What? Cinebench only uses SSE2 on AMD processors even when the same instruction is present?
It converts the instruction to SSE2 if it isn't already SSE2
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