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Architectures that would be better than x86

post #1 of 7
Thread Starter 
I've tried some googling but I can't come up with complete answers to some things I've been wondering.

My knowledge in this area is lacking, so forgive me.

I've been under the impression that the current x86 iterations are "bloated" and loaded down with legacy support dating back to the 80's.

First of all, correct me if I already have a misconception.

Secondly, are there any architectures currently in existence that would run modern consumer software (Operating systems, games, etc.) faster than x86 if those programs were coded for (rather than a messy port) such an architecture? Keep in mind, I don't really know what is involved in coding for a specific architecture.

If nothing like this exists (I was thinking some form of SPARC would be the answer), what would be needed in the design of a new architecture to be more efficient/lightweight/streamlined than x86 for the type of software I've mentioned. e.g. things like using a RISC paradigm rather than CISC that x86 uses.

Thanks for the responses!
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post #2 of 7
RISC and CISC are largely false distinctions at this point.

All x86 CPUs designed in the last 15 years are essentially RISC-like architectures with an x86 decoder. Legacy x86 support of modern CPUs requires such a low transistor count, and so little die area, that it's essentially free.

RISC was a big deal 20 years ago when transistor budgets were tight, but not any more, at least not outside of ultra-low power applications.
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post #3 of 7
Thread Starter 
Quote:
Originally Posted by Blameless View Post
RISC and CISC are largely false distinctions at this point.

All x86 CPUs designed in the last 15 years are essentially RISC-like architectures with an x86 decoder. Legacy x86 support of modern CPUs requires such a low transistor count, and so little die area, that it's essentially free.

RISC was a big deal 20 years ago when transistor budgets were tight, but not any more, at least not outside of ultra-low power applications.
Thank you for that.

Another thing I'm wondering... All of the extensions (SSE5, MMX, AVX, etc.), I don't know how these things are implemented, but do these things "clutter" an architecture or anything like that? Would there be a benefit to an instruction set that was built from the ground up as 64-bit only with modern functionality in mind? (i.e. able to do anything those extensions do, but cleaner and with no legacy support)
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post #4 of 7
Quote:
Originally Posted by WeirdSexy View Post
Thank you for that.

Another thing I'm wondering... All of the extensions (SSE5, MMX, AVX, etc.), I don't know how these things are implemented, but do these things "clutter" an architecture or anything like that? Would there be a benefit to an instruction set that was built from the ground up as 64-bit only with modern functionality in mind? (i.e. able to do anything those extensions do, but cleaner and with no legacy support)
POWER? It's what the PS3 uses (it's a Cell processor) and it is a serious number cruncher. Being limited by low RAM and a cruddy GPU.
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post #5 of 7
Quote:
Originally Posted by WeirdSexy View Post
Thank you for that.

Another thing I'm wondering... All of the extensions (SSE5, MMX, AVX, etc.), I don't know how these things are implemented, but do these things "clutter" an architecture or anything like that? Would there be a benefit to an instruction set that was built from the ground up as 64-bit only with modern functionality in mind? (i.e. able to do anything those extensions do, but cleaner and with no legacy support)
I'm neither a programmer nor an engineer so I can not say for certain one way or another.

I would certainly imagine that x86/x86-64 is fairly cluttered, and that a redesign from the ground up could be made to perform better in many situations, but I also suspect this would require a similar complete overhaul of software.

As it is now, x86 is not being pushed out of it's traditional markets, it's actually invading markets traditionally dominated by custom HPC hardware. Despite it's baggage, x86 architectures have been gaining on nearly all other general purpose ones, again with the sole exception of the ultra-low power mobile area.

Economies of scale, rapid development cycles, and shrinking manufactuing processes ensure that performance and features keep up while at the same time making any baggage less and less relevant.

As for all these extra instruction sets, many of them are implemented very efficiently and share as much hardware from prior sets as possible. Also, they are largely 128-bit (SSEs various incarnations) with 256-bit (AVX) becoming more common. A purely 64-bit architecture would be quite handicapped when working on such datasets.

Quote:
Originally Posted by kabj06 View Post
POWER? It's what the PS3 uses (it's a Cell processor) and it is a serious number cruncher. Being limited by low RAM and a cruddy GPU.
The Cell only has one PPE which is based on a heavily modified and stripped down PowerPC core, which isn't particularly impressive. The other major component of the Cell BE are the SPEs and they aren't general purpose processors and can't really be compared to them.
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post #6 of 7
One good example of what you are talking about would be the older POWER Macintosh ( G4 and G5 ) systems. They were non x86 architectures and the software was cleanly written just for them but they could not keep up with x86_64.

x86 has been around a long time and is highly optimized. That is why it is so entrenched.
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post #7 of 7
Well, some good, modern archs would be:
ARM(low power applications), POWER, SPARC(servers), System Z(mainframe), 68K(cellphone)
and the reason why everyone is stuck with x86 is because the first IBM PC ran x86, MS DOS was for x86 only and that was the only OS that had a HUGE market share(and we'll never know how much market share Linux had)

Also, to port software you have to deal with different things
For instance, VERY low-level things would be different, such as the location of things, how some things are accomplished, how the registers are set up(SPARC uses a register "window"), endianess(how information is stored, I was creating an emulator for my achitecture today which is big endian, but x86 is little endian, quite a challenge) with endianess, a little endian machine would store the number 0x807869 as
cell0 - 69
cell1 - 78
cell2 - 80
in a big endian machine(such as my architecture)
information is store right to left, ex.
cell0 - 80
cell1 - 78
cell2 - 69
as you might imagine, big endian machines make hex dumps a whole lot easier to read.
ARM - bi endian(can do both
x86 - little endian
POWER - bi endian(if I recall correctly)
68K - big endian
SPARC - bi endian
Edited by lin2dev - 10/10/11 at 8:26am
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