OP, here are a couple of things I can recommend:
There is no need to run the voltage as high as you are for 3.2GHz. Do you know if the CPU is a SLACR or SLACM? The SLACR chips are the newer revision that OC well. With a typical Q6600, 3.4GHz is usually the normal OC with a OK OCing chip, and that can be done with usually aroun 1.40v vcore. Your chip has a VID of 1.30v (as seen in your CPU-Z screen shot). The VID is the defualt programmed stock voltage for your chip, and is different within the same line of CPUs. I had a Q6600 with a 1.225v vid, which meant that at 2.4GHz, it ran on 0.075v vcore.
When OCing a quad core, FEB termination voltage is important. You need to increase the FSB Termination and Northbridge voltages as you increase the FSB speed. So think of it as the vcore of the motherboard.
The best way to do this is to find what voltages you need for the desired FSB speeds. So drop your CPU's multi to 6x (to force it to run much lower then stock even) and start increasing your FSB, while at the same time, increasing your NB voltage and your FSB Termination voltages.
Here are some threads discussing all of this
FSB Term voltage
FSB GTL voltages for Penryn quad cores (Q9X50 series), but still good info
Note: To give you an idea about balancing the different voltages, I once did a build with an ASUS P5Q and a Q6600. I ran it at 3.4GHz with 1.38v vcore, 1.26v NB, 1.3v FSB Termination Voltage and the GTL at x.67.
And as to Loadline Calibration (vdroop), here is some info on that too. Now with 65nm CPUs, There is not much danger to enabling it to prevent voltage spikes. The absolute Max vcore for a Q6600 (not trcomended) is 1.50v. They are much more robust then their 45nm counterparts. The 45nm counterparts have a lower voltage tolerance, so people wanted to know more about vdroop. Anyways, here is the info:
Originally Posted by j0njo
Just a quesiton why do you guys knock LLC. It greatly helps vdroop (It actually works on my p5q).
Thank you, good sir!
Vdroop is a safety feature designed to compensate for voltage spikes that occur when a CPU is coming off of, or starting to load. While this voltage spike doesn't seem to affect 65nm CPUs which have a higher voltage tolerance, they do affect the 45nm CPUs. I've seen people kill their 45nm CPUs when running max vcore and enabling loadline calibration. The voltage spikes are just too much for the 45nm core to take.
There is also a voffset which is the difference between what you set in bios, and what windows loads to, and is also part of the CPU voltage safety mechanism.
Here are some pics to illustrate:
Vdroop is the voltage drop when the CPU is under load,. You can see this by opening CPU-Z at idle then noting the voltge drop when stressing the CPU by running Prime95.
Here is an article that explains voffset (vdrop), vdroop and the effects of Loadline calibration (LLC) and the pencil vdroop mod (essentially what LLC is):
Originally Posted by t_russell
Voltage will never spike under load it will droop further than the drop point. 1.4v BIOS = 1.38v windows idle (drop) = 1.32 windows load (droop).
It is the transition from loaded to unloaded where the spikes occur this is the reason for the drop and the droop. If you set 1.4v in BIOS your PROC will never see higher than 1.4v but is unlikely ever to see even 1.4 for more than a few milliseconds.
Here is what is happening with your voltage when the vdroop is eliminated, which illustrates the effects of voltage spikes:
Edited by ericeod - 10/16/11 at 11:50am
No Vdroop means the VRM circuit must work harder at maintaining a constant voltage
In this next case we eliminate Vdroop altogether and examine the chaos that ensues. As illustrated by our model, removing Vdroop does nothing to reduce the magnitude of the idle to full-load transient but does increase the settling time as the VRM must recover to a higher final regulation voltage. As in the case of no Voffset, it is possible to exceed the maximum allowable CPU voltage (VID). Clearly, removing Vdroop gains us nothing and only serves to create problems that are more serious.
So what happens when we remove both Voffset and Vdroop? The answer is simple - bad things. Although the difference between the maximum positive and negative peak overshoot are the same, severe violations to the CPU VID limit occur. If you're asking yourself what's the problem with this, consider the case of a CPU VID of 1.60000V - because the user feels this is the absolute maximum CPU voltage that they will allow. Just how high do you think CPU voltage will go after leaving a heavy load condition? We can't be sure without knowing more of the details, but we can certainly conclude that it will be well in excess of 1.6V. If you've ever run a benchmark only to have your system crash right as it finishes then you have experienced the consequences of this poor setup.
Finally, let's take one last real-world look at the consequences of removing Vdroop. ASUS' implementation of this feature, labeled as Load Line Calibration and included with their latest line of motherboards, is particularly worthy of our attention for a number of reasons. The first is that setting lower voltages with this option enabled actually results in a condition in which the CPU voltage under load is higher than the idle voltage. Imagine our confusion as we desperately struggle to understand why our system is Prime95 stable for days yet continues to crash under absolutely no load. What's more, in spite of the absence of droop and for reasons unknown, enabling this feature artificially raises our CPU's minimum stable core voltage at 4.0GHz from 1.28V to about 1.33V. As a result, our system uses more power under load than is otherwise necessary. Our efforts to reduce our processor's supply voltage backfired - instead of lowering the system's total power consumption we managed to affect a 20W increase.