Originally Posted by DuckieHo;15355954
True, but it is reasonable to expect BD to beat a K10.5 on single-threaded processing. When else has a new architecture not beaten the precursor?
I assuming "laying by hand" included traces as well.
Quitely bluntly, Intel probably has hired some of the best engineer/programmers and have larger skillsets than AMD.
The most outstanding example of architectures not performing as well as previous is the P4. When P4 launched (remember back) IPC dropped by 20% IIRC (vs 9% for bulldozer if Anand got it right) and the increase in frequency was nominal resulting in a processor which beat the previous generation by just a couple of percent (once again similar to bulldozer).
Laying billions of traces in a 3D space is impossible by hand. Even if one only assumes 1 billion traces (a 5 year timespan at 2000 hr/year), and that traces could be laid down at a rate of 1 trace/sec, the total engineer count would be 28. There's some problems here though. Even a minor redesign (not a completely new design, but greater than a minor stepping which is likely just tweaking existing transistors and traces by a little to improve performance and yields) require major rerouting for all traces and minor redesigns happen at least one time per year. This raises the engineer count to 140. Reduce the number of traces per minute to something more reasonable (probably 2-5 when factoring in time to consider consequences of placing trace in a specific place and time for minor reroutes of already placed traces, but not allowing for large errors which require rerouting of large areas) and the numbers skyrocket to (assuming 5 trace/min) 1700 engineers for designing trace layouts by hand.
Laying out traces with a computer would probably take a couple of weeks per revision. After each revision, a group of engineers with knowledge of both electrical engineering and fab engineering (a subset of chem engineering if I am not mistaken) would be need to tweak the design for optimal performance for a specific fab process. This group of 10-15 engineers and 5-10 programmers would accomplish far more in less time.
Faster iteration would make testing easier and make bugs more apparent. Considering that the bug report for Bulldozer (posted elsewhere on this site) is several times shorter than the one for Sandybridge, it seems that AMD did a better job of reducing computational errors even though performance is not good/terrible. If this reduction is due to AMD using computer designs rather than hand designs, I can't see too many problems here either.
I have little doubt that Intel hires the best engineers possible. I also do not doubt that AMD does the same.