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[bsn]OFFICIAL: NVIDIA Confirms Tegra 3 "Kal-El" Name, Launch on November 9th - Page 2

post #11 of 24
Quote:
Originally Posted by DuckieHo View Post
Not true....

Memory controllers still need to improve (dual-channel and faster clocks).
Storage subsystems need to be faster (multi-channel NAND).

Software can always increase.... Imagine running Photoshop's new unblur feature on a smartphone.
Correct. However, I was referring to running too many programs at once, which my Droid X2 bogs down, even if I have RAM left over, much the same way a desktop quad core responds to multiple programs.

Of course sub systems could improve, but that always results in increased power draw at the price of those performance.
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post #12 of 24
Duckie's being pedantic. For all intents and purposes this will increase phone performace immensely. Then again, I'm using a single core Samsun Intercept...

cg
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post #13 of 24
Quote:
Originally Posted by exnihilo View Post
Duckie's being pedantic. For all intents and purposes this will increase phone performace immensely. Then again, I'm using a single core Samsun Intercept...

cg
Indeed, shallow and pedantic.

(If you get the reference)

Sent from my GT-I9100
post #14 of 24
Quote:
Originally Posted by DuckieHo View Post
Not true....

Memory controllers still need to improve (dual-channel and faster clocks).
Storage subsystems need to be faster (multi-channel NAND).

Software can always increase.... Imagine running Photoshop's new unblur feature on a smartphone.
There are three major memory changes that need to happen. The first is the change to 64-bit memory controllers, the second is dual-channel, and the third is speed. All of these have the same problem. They increase power consumption drastically.

I don't think that multi-channel NAND would remove current bottlenecks. That won't become a problem for two or three generations (at least after A15).
post #15 of 24
Quote:
Originally Posted by ComradeNF View Post
Indeed, shallow and pedantic.

(If you get the reference)

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cg
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post #16 of 24
Quote:
Originally Posted by exnihilo View Post
Duckie's being pedantic. For all intents and purposes this will increase phone performace immensely. Then again, I'm using a single core Samsun Intercept...

cg
It is obvious that a quad-A9 is faster than a single Corex A9 or ARM11. However, my point is that bottlenecks will still exist. Developers want a desktop PC-like experience on a smartphone. They have applications that will be ready to run.... they are just waiting on the hardware to catch up.

Phone stutter can still be an issue in the future. The OS really should give more priority to core applications (some of the issues are due to I/O though).


Quote:
Originally Posted by hajile View Post
There are three major memory changes that need to happen. The first is the change to 64-bit memory controllers, the second is dual-channel, and the third is speed. All of these have the same problem. They increase power consumption drastically.

I don't think that multi-channel NAND would remove current bottlenecks. That won't become a problem for two or three generations (at least after A15).
Does dual-channel increase power consumption much? It just fuses instructions together. I believe some current ARM-based implementations already support it (some definitely will).


Multi-channel NAND improve load times....but then again, most devices only have 1-2 NAND chips.
Edited by DuckieHo - 10/24/11 at 10:25am
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post #17 of 24
Quote:
Does dual-channel increase power consumption much? It just fuses instructions together. I believe some current ARM-based implementations already support it (some definitely will).
Doesn't all OMAP4 SoCs include dual channel DDR2?
post #18 of 24
Quote:
Originally Posted by ComradeNF View Post
Indeed, shallow and pedantic.

(If you get the reference)

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post #19 of 24
Quote:
Originally Posted by yashau View Post
Doesn't all OMAP4 SoCs include dual channel DDR2?
Yup, dual-channel LPDDR2.


http://en.wikipedia.org/wiki/Texas_I...ts_OMAP#OMAP_4
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post #20 of 24
Quote:
Originally Posted by DuckieHo View Post
The problem is the LP part. Along with the power savings comes a compromise in performance. Nothing we can do about that until we move to a smaller node, increase the efficiency of the design, or create a totally new (and better) design.
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