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post #31 of 114
What job (if any) do you have The Manual?
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post #32 of 114
I do not have a paid job.

My first Voluntary job is working on this site. My second voluntary job is working with some personnel from universities in the United Kingdom to attempt to import some of VAX into IA-32.

Bed time again, got to hate UK and US time differences.
post #33 of 114
So while we're on the topic of architecture, can anyone explain what associativity means for caches? On CPU-Z it states that some are 2,4,8 way associativity. What exactly is that? Is higher or lower better?
    
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post #34 of 114
This is all very neat and everything....

Here is my questions, Is this true:

Xeon 3000 series for folding / Pi calculations / FPT Server
Conroe 6000 series for gaming / multimedia
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post #35 of 114
Quote:
Xeon 3000 series for folding / Pi calculations / FPT Server
Conroe 6000 series for gaming / multimedia
First by FPT I think you actually mean the File Transfer Protocol (FTP) in relations to a server?

Secondly, in answer to your question, you are correct.
The Xeon is designed to work with data and programs that use advanced mathematics. So SQL and PERL will run very well on the Xeon architecture

Quote:
So while we're on the topic of architecture, can anyone explain what associativity means for caches? On CPU-Z it states that some are 2,4,8 way associativity. What exactly is that? Is higher or lower better?
There are many ways of putting this.
Associativity is the amount of lanes that the cache can be accessed and addressed from (locations within the processing unit). The greater the associativity the more accessible it is for the processor.
Dual cores with shared cache must have a large associativity as processing units within two cores will be accessing and addressing the internal memory.
Within the processor are multiple processing units for mathematics and logic, these units are able to access the onboard cache.
These units include: Floating Point Units, Arithmetic Logic Units, AGU's, Vertex/Geometry Processing Components/Units and the Memory Sub-System.

For example if you have an 8-way associativity the following can simultaneously address the L1/L2/L3 cache:

2x Floating Point Units (Core 0)
2x Floating Point Units (Core 1)
1x Arithmetic Logic Units (Core 0)
2x Arithmetic Logic Units (Core 1)
Memory Sub-System (Core 0+1)
Total Addressing Count = 8 (8-way).
post #36 of 114
Hi fellas/gals

I've been following your interesting discussion about the new Xeon 3000 processor for the last week or so. I decided to register so I might be able to to add what I've found out about them myself up to now.

Both Core 2 and Xeon 3000 are Conroe chips. The frequencies and cache are the same for all of these chips. The Core 2 E6300 frequency is 1.83GHz, the E6400 is 2.13GHz, the E6600 is 2.40GHz and the E6700 is 2.66GHz. Similarly the Xeon 3040 frequency is 1.83GHz, the 3050 is 2.13GHz, the 3060 is 2.40GHz and the 3070 is 2.66GHz.

The L2 cache sizes are identical. The Xeon 3040 and 3050 chips have 2MB L2 cache like the Core 2 E6300 and E6400 chips. The Xeon 3060 and 3070 have 4MB L2 cache like the Core 2 E6600 and E6700 chips. There is no Level 3 cache used on either series of chips. This is confirmed by the specifications found on the Xeon 3000 boxes; You may recall some confusion when the Xeon 3000s first came out where it was thought that they all had 4MB L2 cache like the Xeon 5100 (Woodcrest) Series. This confusion has since been cleared up by Intel. Unfortunately Intel has not corrected the wrong information found at the Xeon Comparison Chart where it shows that the Xeon 3000s have an L3 cache and no L2 cache.

The voltage specifications for the Core 2s and Xeon 3000s are the same as well. Core 2 voltages = 0.8500 - 1.3625. Xeon 3000 voltages = 0.8500 - 1.3625. And they are both LGA775 (FC-LGA6). If anyone has gotten different voltage specs for either series please post them here.

There must be some differences between the Core 2 and Xeon 3000 chips though. I think in order for the Xeon 3000s to get a "Xeon" designation the instructions are probly a little different. That is that the instructions are meant to favor the demands of server operations. They're probly slightly better processors IMO. But it's not like you're going to get a Tulsa or anything.

I hope I was able to add something useful to this discussion.
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post #37 of 114
Wow this thread is amazing, glad I found it.

It has me wondering wether to get the E6300 or 3040. I would thinking the Xeon 3040 would be a better choice for digital audio work.
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post #38 of 114
subzer0, thank you for your contribution to the thread.

Your first point:

Quote:
The L2 cache sizes are identical. The Xeon 3040 and 3050 chips have 2MB L2 cache like the Core 2 E6300 and E6400 chips. The Xeon 3060 and 3070 have 4MB L2 cache like the Core 2 E6600 and E6700 chips. There is no Level 3 cache used on either series of chips. This is confirmed by the specifications found on the Xeon 3000 boxes; You may recall some confusion when the Xeon 3000s first came out where it was thought that they all had 4MB L2 cache like the Xeon 5100 (Woodcrest) Series. This confusion has since been cleared up by Intel. Unfortunately Intel has not corrected the wrong information found at the Xeon Comparison Chart where it shows that the Xeon 3000s have an L3 cache and no L2 cache.
This is correct, and incorrect. The original revision of the 3000 Xeon series contained within them L3 ECC cache. With the later revisions, due to upgraded functions, L2 cache was implemented.
The Xeon 3050 I have tested contains a 2MB ECC L3 memory line. This is because my original Xeon is one of the first to have been produced when ECC L3 was used, apparently.
I believe the earlier chips contained L3 cache due to the information from the internal cache Data Array and the position of the cache within the physical structure of the chip itself, and the Intel "Tech" logs for the Core Micro-Architecture implementation into the server market.

It is true that currently the new revision chips will contain L2 cache, that I had not thought of when posting my previous response. However it is still correct due to the existence of the chips themselves.

Be aware that Core 2 Duo does contain an L3 ECC Memory Line if you were too look carefully, therefore L3 cache could have been implemented into Core 2 Duo if there was a need for it. Only ~512KB could have been implemented however due to the space on die.

Your second point:
Quote:
The voltage specifications for the Core 2s and Xeon 3000s are the same as well. Core 2 voltages = 0.8500 - 1.3625. Xeon 3000 voltages = 0.8500 - 1.3625. And they are both LGA775 (FC-LGA6). If anyone has gotten different voltage specs for either series please post them here
Core 2 Voltages = 0.8500v - 1.3500v (1.3625 is above rated, warranted, voltage specification). The voltages for the Xeon class equivalent processors are identical to their desktop variant.
Quote:
Originally Posted by INTEL
Maximum Rated Voltage: 1.35v
However if we were to take these chips to a "very low" temperature.

Example:
Processor operating at -100C, operating as semi-conductor.
Take resistance to be negilable/extremely small.
Current physical properties suggest that the processor is capable of operating with high integer values (or non-equivalent) of voltage.
Approximated value would be 2.00v+ (Current [A] depending).
If you were to take a Xeon down to an equivalent thermal level you would notice it would operate with a higher voltage than a Conroe/Allendale

Quote:
There must be some differences between the Core 2 and Xeon 3000 chips though. I think in order for the Xeon 3000s to get a "Xeon" designation the instructions are probly a little different. That is that the instructions are meant to favor the demands of server operations. They're probly slightly better processors IMO. But it's not like you're going to get a Tulsa or anything.
As previously mentioned there are slight differences
post #39 of 114
a few questions here again. if you have both manual is there a chance you might be able to show some benchmarks ( I know not real world but it's better then nothing) between the two cpu's?

also mind continuing on with the whole SIMD thing you where going to start?


last how would the conroe do with 512kb of l3 cache mixed in with the rest of the cache currently on board. also what is the point of the l3 cache
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post #40 of 114
I only own an E6600. The X3050 I have tested belongs to the engineering company I work with. It is possible when I next see some of them that I may be able to get access to the system to run some "normal" benchmarks

A bit busy at the moment, I will update this post with my answers about Conroe L3 and SIMD shortly when I have finished my work
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