Need some help understanding LLC and offset OCing - Page 8

Not personally (the only scope I've got is crap), but other people certainly have.

I've consistently seen the opposite, across several CPUs (multiple 920s, a 950, a Xeon W3540, and a 970) and several motherboards (ASUS P6TD Deluxe, ASRock X58 extreme, three Gigabyte EA-X58-UD3Rs, and a X58A-UD5). I'm also speaking of long testing runs (24-48+ hours).

My UD5 is the first board I've had where it was even really that close, and I recently turned off LLC after discovering it saved me about 3-5C under load. And that was going from the level 1/moderate setting to off. Level 2/high had serious idle/low load stability issues with similar load voltages to the other settings.

These tests are meaningless (for the purposes of this discussion) for a number of reasons:

1. The oscilloscope used is a Hung Chang 3502C ( http://www.electro-tech-online.com/custompdfs/2009/06/Man_P3502C.pdf ). This is only a 20MHz scope, which is of woefully insufficient bandwidth. Intel specifies a 100MHz scope (page 96, 98 : http://www.intel.com/content/www/us/en/processors/core/2nd-gen-core-family-mobile-vol-1-datasheet.html ). A scope of lesser frequency probably cannot reliably catch transients of the duration we are looking for.

2. There are no scope shots comparing LLC off to the LLC level used, so even if it was an acceptable scope, we'd have nothing to really compare the results to.

3. This is an i7 2600k on a very recent board with a 24-phase VRM. The VRM hardware is total overkill relative to the current the CPU could draw, so isn't going to be a good comparison to any board with a worse VRM or a higher current CPU. That said, the OPs board is equally over-capable relative to a 3770k.

If I had your experience, I would not use LLC either. However, my experience has been exact opposite, no difference in vcore needed, stability, and since same vcore, no difference in temps, hence I use it.

And I have never seen any oscilloscope proof one way or the other that LLC increases magnitude of overshoots...would have to see video proof before I would believe it.

Though after hearing your experience, I will double check LLC on vs off on my current GB ud5 z77 when I get back home next week..

I'm having trouble find any scope shots of anyone using anything anywhere near specification. I know they exist but finding them among piles of people using inadequate scopes is going to take some doing.

Still, I'm puzzled as to why it would be surprising if a feature (LLC) that removes/limits the feature (vdroop) that is meant to mitigate overshoots had the effect of increasing overshoot.

Again, I wouldn't be entirely surprised if a high-end VRM kept overshoot within spec even at a below Intel spec load line. However, given that the XS link above shows ~10-15mv ripple at a fairly constant load, with a low bandwidth scope, in very low ambients (seriously, 12.4C!?) with a CPU that is only pulling a small fraction of the current the board's VRMs are rated for, I also would not be remotely surprised if specified overshoot was exceeded during shifting loads, under more realistic conditions (those VRMs are going to be 30-40C hotter in a closed case at moderate-high room temperatures), when measured with a higher bandwidth scope.

Definitely worth more testing.

Anyone have a 100MHz+ scope with logging I can borrow?

vrm circuity limits overshoots. vdrop/vdroop just lowers vcore by the same amount as overshoot, so overshoot that still occurs doesnt go past bios setting.

LLC off, bios setting = max overshoot. 1.4 bios setting, 1.34cpuz load, so overshoots may be .06v.

LLC on, bios setting no longer = max overshoot. 1.34 bios = 1.34 cpuz load, overshoots same to .06, given same vrm circuitry.

Until I see scope irrefutable proof otherwise. vdrop/vdroop does not prevent overshoots or lower them, it just drops vcore so overshoot doesnt go over bios setting.

You could design a system to nearly eradicate overshoots, instead of designing a system to just "compensate" for them, but no one would buy such an expensive mobo.

So far, I'm finding the same thing with a P8Z77-V and 3570k. Comparing 25% and 75%, I get the same load volts for stability, with same temps.

Raja@Asus posted a guide (written by Asus?) that recommends 50% LLC. From page 13 of the pdf:
"For 24/7 use a setting of 50% is considered optimal, providing the best balance between set and load voltage in a manner that compliments the VRM for all loading conditions. Some users prefer using higher values, although this will impact overshoot to a small degree."

For my board, 75% LLC gives the most stable voltage and most straightforward OC (manual V). 50% gives .02-.03 Vdroop in the first part of Prime95, but I get another ~0.01 step of Vdroop about 15 minutes in (wall watts go up then, too), which sometimes causes an error if it's already at the minimum V for stability. 75% gives a 0.01 bump which is very stable.

I've seen statements like "Vdroop is good since it reduces temps when the processor is under heaviest loads." I assume these are referring to the case where Vcore is well above the minimum V for stability? For OCing at or slightly above the minimum stable Vload, I don't see how Vdroop could be good if it then causes an error or crash. For offset V with current BIOS controls, I can certainly see how Vdroop is a useful tool, as it's the only way to adjust the shape of the V(VID) curve. But as mentioned before, it seems far more logical for the BIOS to provide 2 Voffset controls: 1 for idle, 1 for load, and interpolate on top of VID.

Voffset/vdroop also allows full load voltage to settle closer to the maximum undershoot voltage. No VRM responds instantly to changing load demands; there is always some delay.

Without LLC voltage dips, then the VRM responds by lowering voltage in accordance with the default load-line, resulting in a much smaller rebound. With higher levels of LLC, the same dip occurs, but voltage is pushed backup higher. If the minimum voltage achieved during that dip isn't enough to cause instability, load voltage is likely to settle closer to the minimum required when LLC is left disabled.

Even if modern, high-end VRMs are good enough to mitigate most of this discrepancy, LLC still does nothing except conceal the maximum voltage delivered to your CPU. So, best case scenario, LLC doesn't hurt, but it doesn't really help anything either; it just conceals voltage spikes from the user. Worst case scenario means you need more full load voltage to remain stable.

It means you aren't stable.

You assume incorrectly.

The minimum voltage dipped to with LLC off (relative to higher levels of LLC) is typically much closer to the full load voltage it settles at.

Check out pages 5 and 6 of this article for a more detailed explanation of what's happening: http://www.anandtech.com/show/2404/5
Edited by Blameless - 5/12/12 at 6:14pm

You view LLC as unnecessary. I view vdrop/vdroop as unnecessary when overclocking, since overshoots are going to occur LLC on or off, since same vrm circuitry and same load voltage. Just with LLC off, you know overshoots dont exceed bios setting, which I could care less about when overclocking.

You say LLC is hiding spikes, I dont think of it like that (even though i understand your point). I think of it as vdrop/vdroop sets idle vcore unnecessarily high, so voltage can drop prior to load and overshoots not exceed bios setting.

In reality neither is better or worse, just personal preference. And my personal preference is LLC on.

Excellent article -- thanks. It's a pretty interesting controls problem. So, to paraphrase back to see if I understand it: a higher idle V that droops under load is helpful because the VRMs undershoot to a higher minimum V, which helps stability at that instant of undershoot. Once passed that instant, the Vload can then settle to a lower value compared to no Vdroop. Or casually: having Vidle higher than Vload provides a bit of reserve energy (in the capacitors) that is tapped the instant load is turned on -- before the VRMs can respond -- and so the ensuing undershoot is less. ...

Page 51 of this Intel doc has some scope pics of the undershoot and overshoot for a 1366. I couldn't find the version for the 1155 socket, though.

Some details I'm still confused about--
- If idle is at 1600 MHz and load is at 4500 MHz, how does the idle-load transition work if the Voffset method is used? Maybe in this order (?) -- increase Vcc to VID(4500), then increase Ratio for 4500, then load cpu? So if using Offsets, even though Vidle is below 1.0V, the benefits of Vdroop can still be realized, albeit with a little delay to complete the steps?
- How much does digital control of the VRMs change the initial undershoot response? I wonder: if we know a load is turning on and the caps are about to be discharged, could a coordinated current increase be programed to occur simultaneously with the load, to keep the V from undershooting (as much)?

This isn't reality for every setup. It's fairly clear, that at least in some cases, removing vdroop results in the need for a higher load voltage for the minimum undershoot to be the same.

If this isn't the case with your setup, then yes, it becomes a matter of preference.

The difference for my primary system is large enough for the minimum stable load voltage (and perhaps VRM workload) to be reduced enough (probably only handful of mV, but enough) when LLC is disabled that I reliably reduce CPU temperature by 3-5C and CPU power consumption by a good 10-15w.

I suspect these factors would vary by VRM components and firmware implementations. No way to really know for sure without direct measurements.