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AMD's Quad cores have large advantages over Kentsfield - Page 4

post #31 of 148
ROFL... Let's hope it won't be a DOA.

Both Kentsfield and 4x4 are temporarily solutions until 'true' quad core CPUs appear, both on the Intel and the AMD side of things. Then we'll see some real nice fireworks!
    
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post #32 of 148
Quote:
Originally Posted by selectodude
Do you mean ETA?

I assume that CSI isn't going to be "dead on arrival".
Ha lol, good one.
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post #33 of 148
Hopefully developers start making apps than can actually utilize dual core cpu's
    
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post #34 of 148
They have?..

Anything that is multithreaded can take advantage of as many cores as you have in the system. Which alot of games are being multithreaded.
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post #35 of 148
Thought I read somewhere that AMD was planning on activating all of the memory controllers so that each core can have it's down dedicated bank of RAM. Doesn't sound possible with the low pin count, but maybe I'm thinking of the server quad-cores??
    
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post #36 of 148
Well, there they go, bragging about a 5% performance gain . Makes me wonder...
post #37 of 148
Quote:
Originally Posted by Jori
lol I was thinking Date of Arrival, o well. Yes I mean more like ETA

is this csi intels mem controler?
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post #38 of 148
Thread Starter 
Quote:
Originally Posted by Jori
They have dedicated L2 cache, and shared L3 cache, which im sure could very well be implemented with on the chip HT link, if at all possible. AMD does not need large cache's. Intel does. Why? Simple, the FSB. It takes longer for the RAM and CPU to communicate with each other, so build a CPU with alot of cache helps alleviate that problem. AMD on the other hand has a very very fast and efficient way to communicate with RAM and CPU's. So thus, they dont need that much cache. Also effictively, each AMD dual core CPU in 4x4 will have a 2000mhz bus speed, that is 1000mhz each CPU, they dont even have to worry about bandwidth.

And Swayne, the initial testers of the Kentsfield said that the Kentsfield was being limited a bit by the FSB.

edit: Also remind you, this is talking about 4x4, not their quad cores due out in 2h' 07.

lol and PwnJohnson, I hope that is sarcastic.. Because Intel is switching to a "copy" of Hyper Transport, called CSI-Interconnect. I think that alone says they realize that AMD has had a superior way of having a system communicate, and they want in on it as well

well done jori! when topics seem to get outta hand and incorrect you always get in there and set everything straight. Just as if you were in the OCN Police force.

Remember guys, you can flame and bash AMD Quad or Intels Kentsfield as much as you want, but its the actual performance and benchmarks, not hearsay that matters
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post #39 of 148
yes this is true come one amd release it!!!!! i want to bench it
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post #40 of 148
Quote:
Originally Posted by Cheetos316
Thought I read somewhere that AMD was planning on activating all of the memory controllers so that each core can have it's down dedicated bank of RAM. Doesn't sound possible with the low pin count, but maybe I'm thinking of the server quad-cores??
Socket F is 1207 pins, 4x4 is on socket F.

CSI I havent done too much homework on, but I do know its theoretical bus has more bandwidth, but i think thats just that, theoretical. Guess well have to wait and see where they go with it. Ill try to get some more info, hold on.
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