Originally Posted by Homeles
I think the AT article covered more.
AT gets a bit more in depth with the L3 cache changes and touches on sleep states/power management, while this article completely ignores it. This article also makes no mention of the increased L3 latency that the AT article mentions. The RWT article does a better job on memory hierarchy. AT does a better job of writing it in a way that you can actually understand what's going on.
I'd say just read the AT article. I love both sites, but this is far too technical to keep track of everything that's going on, and the AT article hits subjects that aren't mentioned here.
Also, this article puts Haswell at 10% faster than Sandy Bridge in existing applications. Anand Shimpi predicted 5-15% over Ivy Bridge per clock. I think the RWT article, annoyingly, uses Sandy Bridge and Ivy Bridge interchangeably. So I guess 10% on average, before potential clock speed increases.
The RWT article is about the architecture design rather than the implementation details. Cache latencies and sleep states don't have a direct impact on that design and that's why the aren't covered to any great extent. I agree that the article is quite technical, but that's what makes it great.
The reason why Ivy bridge and sandy bridge are used interchangeably is that the big-picture architecture didn't change (the changes were lower than the level of abstraction presented in the RWT article, so they aren't significant from that perspective).