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[BSN] Analysis: AMD Kaveri APU and Steamroller Core Architectural Enhancements Unveiled - Page 5

post #41 of 62
Quote:
Originally Posted by PiOfPie View Post

I remember an older article a couple months back (Anand, maybe?) saying that the dynamically-resizing L2 would be another thing that would help out with power along with the smaller process and RCM. Anyone have any guess how many watts it might shave off?

It'll shave off watts during idle, and for laptops/tablets, every single bit counts. During full load, it won't save any watts unless the L2 cache wasn't in use due to the program/thread not needing that much.
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post #42 of 62
The smaller process and inclusion of RCM would reduce watts during load.
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post #43 of 62
Quote:
Originally Posted by Liranan View Post

AMD article on HSA.

Short Anand article.

Basically it means fusing the CPU and GPU together so the GPU becomes the CPU and boosts calculating output by several factors, resulting in Terraflop CPU's.

Quote:
Originally Posted by Artikbot View Post

Long story short, the ability to have fully coherent memory between CPU and GPU so the GPU can execute CPU tasks (and perhaps viceversa?), incredibly boosting the overall performance.

Thanks guys!
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post #44 of 62
Kaveri means "friend" in finnish biggrin.gif
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post #45 of 62
Quote:
Originally Posted by SCollins View Post

please enlighten the rest of us, why the socket is a problem.
The problem is that the HyperTransport bandwidth from AM3+ is barely enough for 24 lanes of PCIe 2.0, which means that AMD can't release a PCIe 3.0-compliant chipset for AM3+
Yes, I am saying that the Sabertooth 990FX R2/GEN3's PCIe 3.0-compatibility is little more than marketing.
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post #46 of 62
Quote:
Originally Posted by Liranan View Post

AMD article on HSA.

Short Anand article.

Basically it means fusing the CPU and GPU together so the GPU becomes the CPU and boosts calculating output by several factors, resulting in Terraflop CPU's.

With all of these links, you should put a direkt link to the HSA Foundation to see who are its members. wink.gif

http://hsafoundation.com/

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post #47 of 62
Quote:
Originally Posted by Asterox View Post

With all of these links, you should put a direkt link to the HSA Foundation to see who are its members. wink.gif

Which is nothing short of impressive, together with AMD are the most important semiconductor manufacturers and ARM chip designers in the globe...

ARM, Samsung, TI, Qualcomm and Mediatek make up the vast majority (if not the whole) of the ARM scenario, thumb.gif
   
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post #48 of 62
Quote:
Originally Posted by Arni90 View Post

The problem is that the HyperTransport bandwidth from AM3+ is barely enough for 24 lanes of PCIe 2.0, which means that AMD can't release a PCIe 3.0-compliant chipset for AM3+
Yes, I am saying that the Sabertooth 990FX R2/GEN3's PCIe 3.0-compatibility is little more than marketing.

ok, but even if you had the bandwidth, you have dozens more bottlenecks right down the pipe that will cuase attrition elsewhere. bottoline, if there was a competitive reason to redesign the socket, AMD would do so.
post #49 of 62
I think AMD has a physics advantage over Intel's engineering prowess provided that it can deliver the APU's advantage to the next step that is the engineering problem.
Even as electrons travel at the speed of light, AMD should have an inert advantage since a closer approximation to singularity is reached compared to Intel's light latency limit from Cpu to XeonPhi via QPI in a best case scenario. AMD could leverage this latency&data transmit efficiency to use higher bandwidth & high latency memory to reach folds of overall performance at similar latency& power consumption.
Next step: exceed previous transmit per power threshold set by Intel.
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post #50 of 62
Quote:
Originally Posted by Artikbot View Post

Which is nothing short of impressive, together with AMD are the most important semiconductor manufacturers and ARM chip designers in the globe...

ARM, Samsung, TI, Qualcomm and Mediatek make up the vast majority (if not the whole) of the ARM scenario, thumb.gif

ARM manufacturers are participating because they know they will have stiff competition from Intel. As Intel are going their own route this, if it works out, will boost their mobile chips to far beyond that of Intel's.
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