Overclock.net › Forums › Industry News › Hardware News › [fudzilla] GloFo demos working 20nm TSV silicon
New Posts  All Forums:Forum Nav:

[fudzilla] GloFo demos working 20nm TSV silicon

post #1 of 4
Thread Starter 
Quote:
Globalfoundries has demonstrated a working 20nm chip using through-silicon vias (TSV). Glofo has been looking at TSV as a method of stacking chips and TSMC and Nvidia have also dabbled with stacked designs.

http://www.fudzilla.com/home/item/30974-glofo-demos-working-20nm-tsv-silicon
post #2 of 4
Quote:
Abstract

In three-dimensional (3D) integration, the increasing supply current through both package and through-silicon-via (TSV) would lead to a large simultaneous switching noise potentially. In this paper, a noise suppression technique using low power active decoupling capacitors (DECAPs) is proposed for TSV 3D integration. Through the latch-based noise detection circuitry, the power supply noise can be detected and regulated via active DECAPs. Based on UMC 65 nm CMOS technology and TSV model at 1 V supply voltage, the proposed noise suppression circuit can realize maximum 7.4 dB supply noise reduction and 12 X boost fact at the resonant frequency.

Source

Interesting if this will be used for CPU production (or just GPU). Seems it would be a good match for the Resonant Mesh Technology that's being adapted to the FX CPU's.
post #3 of 4
CPUs and GPUs produce a lot of heat. Stacking them would lose too much surface area for cooling. TSV is best suited for stacking DRAM such as HMC.
post #4 of 4
TSVs might still be useful for computational products. It has been suggested that a layer of cache could be stacked on top of compute logic to save space without impeding cooling too much. I doubt we'll see stacked logic any time soon, however, which is in line with what you had stated.
New Posts  All Forums:Forum Nav:
  Return Home
  Back to Forum: Hardware News
Overclock.net › Forums › Industry News › Hardware News › [fudzilla] GloFo demos working 20nm TSV silicon