As part of the companies' ongoing R&D collaboration, IBM and AMD today presented papers at IEDM describing the use of immersion lithography, ultra-low-K interconnect dielectrics, and multiple enhanced transistor strain techniques for application to the 45nm microprocessor process generation.
AMD and IBM said they expect the first 45nm products using immersion lithography and ultra-low-K interconnect dielectrics to be available in mid-2008.
Current process technology uses conventional lithography, which, the companies said, has significant limitations in defining microprocessor designs beyond the 65nm process technology generation. Immersion lithography uses a transparent liquid to fill the space between the projection lens of the step-and-repeat lithography system and the wafer that contains hundreds of microprocessors. This provides increased depth of focus and improved image fidelity that can improve chip-level performance and manufacturing efficiency, the companies said. According to IBM and AMD, performance of an SRAM cell shows improvements of approximately 15 percent due to this enhanced process capability, without resorting to more costly double-exposure techniques.
In addition, the use of porous, ultra-low-K dielectrics to reduce interconnect capacitance and wiring delay further improves microprocessor performance and lowers power dissipation, the companies said. This advance is enabled through the development of an ultra-low-K process integration that reduces the dielectric constant of the interconnect dielectric while maintaining the mechanical strength. The addition of ultra-low-K interconnect provides a 15 percent reduction in wiring-related delay as compared to conventional low-K dielectrics, according to the duo.
The continued enhancement of AMD and IBM's transistor strain techniques, the companies said, has enabled the continued scaling of transistor performance while overcoming geometry-related scaling issues associated with migrating to 45nm process technologies. In spite of the increased packing density of the 45nm generation transistors, IBM and AMD said they have demonstrated an 80 percent increase in p-channel transistor drive current and a 24 percent increase in n-channel transistor drive current compared to unstrained transistors.
IBM and AMD, which have been collaborating on the development of next-generation semiconductor manufacturing technologies since January 2003, are not without competition. Texas Instruments has also expressed plans for immersion lithography at the 45nm node.
Looking out beyond todayâ€™s news, AMD and IBM are looking forward to a future of working on even smaller nodes. In November 2005, the two companies announced an extension of their joint development efforts until 2011 covering 32nm and 22nm process technology generations.