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Why the Bulldozers L3 cache is so slow ? - Page 3

post #21 of 31
hello,
I had an Athlon 2 and the phenom 2 part with L3 was about a 1/4 better than the Athlon.
the Athlon 2 was also very good, just a little bit choppy on bf3 as its was 2.6ghz, thus new fx..
Edited by MrPerforations - 5/13/13 at 11:20pm
    
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post #22 of 31
I think the difference willen become more appearent when you add more modules and let them solve a taske which requires more communication between the Cores. With only 2 modules active the l3 cache dousnt come to its full right. Also it maken the cpu less dependent on the ram
post #23 of 31
Quote:
Originally Posted by DaveLT View Post

Cache is always filled. It simply means that either the L3 cache is missed so frequently or that everything can be found in the L2

Exactly.

Although my knowledge doesn't go as far as knowing which case is which tongue.gif

Note that a very significant part of Bulldozer's lack of performance is that branch mispredictions incur in a MASSIVE penalty. Each time the predictor fails and has to run the code again it means that particular pipeline has wasted more than 30 clock cycles. That is quite a lot.

I'm taking a wild guess here, but I dare say that the shared decoders play a role in the L3 performance.

Data cannot be fetched separately for each core at the same time, but instead, it has to be fetched in a row. It is an approach that works very well if both cores are executing the same workloads, as it is enough with fetching and decoding the data once. But with different simultaneous loads, what I think happens is one core sits idle until the decoder has finished fetching and decoding for the other.

So, the L3 isn't getting fully utilised, as there are only four decoders fetching data instead of eight.

Don't quote me on the above though. It's all a guess, and I'd love for anyone to come uncover the truth on it! tongue.gif
Edited by Artikbot - 5/14/13 at 12:22am
   
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post #24 of 31
I also dare say the shared decoder might have caused the lack of L3 performance but also AMD has had latency problems ever since K10 tongue.gif
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post #25 of 31
Quote:
Originally Posted by DaveLT View Post

I also dare say the shared decoder might have caused the lack of L3 performance but also AMD has had latency problems ever since K10 tongue.gif

To be fair, the first K10's TLB bugfix totally disabled L3 cache, so they've had worse problems than latency lachen.gif
   
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post #26 of 31
Quote:
Originally Posted by Artikbot View Post

To be fair, the first K10's TLB bugfix totally disabled L3 cache, so they've had worse problems than latency lachen.gif
I didn't know about that lol
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post #27 of 31
Maybe cuz the L1 cache is so teeny wth.gif
 
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post #28 of 31
or because the cpu never uses all the cores to use the full L3, after all most programs are single threaded.
    
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post #29 of 31
a CROSSBAR still exists in FX.

makes a bottleneck for L3 cache. Each modules can give out dual writes but the crossbar can not full fill that option. Thus you to have wait, causing a latency penitently

you don't actually need L3 cache to connect the modules.

The modules them self's already have a link to each other with hyper transport links.
    
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post #30 of 31
Looking at the FX / Vishera products we can see that we have quads with no L3 or smaller than normal ,but six cores and eight cores have it all.
Also the Opterons have 16 cores.Maybe more than 4 cores is the only scenario where L3 kicks in.

AMD could of get cheaper CPU-s having in mind the current state of the L3 performance on the desktop FX.

I wonder if AMD will release an octocore with no L3 cache ,that should show in a direct comparition if the L3 has any use in intensive multicore usage..
The power usage with such CPU-s could be interesting to find out.

Maybe L3 is the one that pushes FX CPU-s in power consumption as the APU-s are quite fine in this department even 4 vs 4 cores.

Will the new AMD CPU-s have L3 cache ?!
Any info on this ?!
   
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