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[Sweclockers] - AMD prepares FX-9000 up to 5.0 GHz - Page 78

post #771 of 953
"Keep hope alive" - AMD (and Jesse Jackson). tongue.gif
post #772 of 953
Quote:
Originally Posted by Alatar View Post

Because the corvette is just flat out faster. Unless it's specifically being prevented from accelerating or reaching faster speeds than a smart then it's going to be faster. The corvette is inherently faster.

The current new instructions not being built into Core 2 does not mean that the architecture is inherently slower and will only match PD when something is actively stopping PD from being fast.

If you don't use the new instructions, you are inherently stopping the PD from being as fast as it can be.
   
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post #773 of 953
Quote:
Originally Posted by Blameless View Post

I agree the emphasis should be on overall performance, but single threaded performance is still the limiting factor in many real scenarios.
Not so much...

Steamroller will improve mutli-threaded performance far more than single threaded performance.

That 30% performance boost everyone is talking about will likely only be seen in heavily threaded tasks.

The biggest (though far from only) change to steamroller is widening the front-end, and the front-end is already wide enough to accommodate one core per module without a bottleneck. Thus, if you are running equal or fewer threads than the number of modules you have, you will likely see a much more modest improvement.

I hope they improve memory controler as well tbh it is lacking as well compared to the intel ... performance gains would be welcome on that front as well
post #774 of 953
Quote:
Originally Posted by keiths View Post

What's the ETA for AMD to improve IPC?
Steamroller...

Bulldozer/Piledriver -> Steamroller/Excavator
2 ALUs -> 4 ALUs
2 AGUs -> 4 AGUs
1*128b FMA unit per core -> 2*128b FMA units per core.


^-- Steamroller.
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post #775 of 953
Quote:
Originally Posted by Blameless View Post

I agree the emphasis should be on overall performance, but single threaded performance is still the limiting factor in many real scenarios.
Not so much...

Steamroller will improve mutli-threaded performance far more than single threaded performance.

That 30% performance boost everyone is talking about will likely only be seen in heavily threaded tasks.

The biggest (though far from only) change to steamroller is widening the front-end, and the front-end is already wide enough to accommodate one core per module without a bottleneck. Thus, if you are running equal or fewer threads than the number of modules you have, you will likely see a much more modest improvement.

Actually if the leaked image is SD or SD 2.0 or what you call it, their focus is ST this time round.
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post #776 of 953
Quote:
Originally Posted by Kuivamaa View Post

Actually if the leaked image is SD or SD 2.0 or what you call it, their focus is ST this time round.
The picture is Steamroller from Kaveri, I don't know which event AMD showed it off but I assume it was meant for computex.

Bulldozer has always been for singlethreading with leniency towards multithreading. Bulldozer is focused on singlethreading while improving multithreading's latency. One core can utilize all resources and operate at 100% effective performance or both cores can utilize all resources and operate at 80% effective performance. On the multithreading side the shared instruction cache and L2 cache sped up multithreading by a bit. imho, Steamroller is focused on pure-throughput on both singlethreading and multithreading.

Notes:
Bulldozer Module Efficiency(usage of resources) -> Single Core: 80%, Dual Core: 95%
Edited by Seronx - 6/11/13 at 2:36pm
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post #777 of 953
Quote:
Originally Posted by Blameless View Post

Not so much...

Steamroller will improve mutli-threaded performance far more than single threaded performance.

That 30% performance boost everyone is talking about will likely only be seen in heavily threaded tasks.

The biggest (though far from only) change to steamroller is widening the front-end, and the front-end is already wide enough to accommodate one core per module without a bottleneck. Thus, if you are running equal or fewer threads than the number of modules you have, you will likely see a much more modest improvement.

The micro-op queue, similar to Intel's micro-op cache, which gave SB most of its IPC advantage over Nehalem, should make a quite a bit of difference. And everyone knows AMD's branch predictor is nowhere near as good as Intel's, so there's improvement to be had there as well.

I believe they're also implementing partial shutdown of the L2 cache when unused, that should allow the cores to remain in their turbo state longer. Of course, that won't really help overclockers.
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post #778 of 953
Are there official prices and release dates for the FX-8770 and the FX-9000 yet?
   
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post #779 of 953
AAND power consumption targets. Not that it matters to us BUT, higher air OCs anyone? tongue.gif I recall them having planned for a 6core APU and a 10core FX for SR.
Of course we won't need a 10-core but if it's really powerful enough to bring performance beyond nehalem levels (30% brings them within 5% of sandy i think) a 10-core won't come cheap ...
Otherwise a 6-core will kick the snot out of Haswell.
Now intel, where's our Ivy-E? tongue.gif
Edited by DaveLT - 6/11/13 at 10:33pm
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post #780 of 953
So the doubling of all the units only result in a 30% improvement or different speculations?
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