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A possible reason why Intel was forced to use TIM instead of solder with IB & Haswell - Page 2

post #11 of 15
solder was designed for Cpus with TDP over 100W, especially in the 130W TDP range, ie the enthusiast cpus. As Ivy and Haswell TDP decreased into range intel typically uses paste...to save millions, then intel used paste. overclocking specs are not considered.

The theory of unable to use solder on those will get borked when IVY E and then Haswell E comes out, those at 130W are going to have solder to meet specs, and fall in line with intels historical use of solder vs paste.

Intel using tim on 84W TDP processors is the norm, not the exception.

What changed is TDP driven down by efficiency chasing for mobile applications.
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post #12 of 15
Quote:
Originally Posted by Watagump View Post

with all the high tech robots etc out there, it seems they could do solder, smaller die or not.

Placing the solder correctly isn't the issue; thermal cycling long after the fact, is.
Quote:
Originally Posted by opt33 View Post

The theory of unable to use solder on those will get borked when IVY E and then Haswell E comes out

How so?

The theory is that solder is unusable on Ivy and sandy because the smallest dimension of their dies is too low to reliably adhere to over time.

Ivy-E and Haswell-E are going to be much larger dies, and will have considerably greater width than even the original Sandy.
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post #13 of 15
Intel has always used PTIM on low TDP cpus, if specs permit. Ivy and Haswell are no exception.

But perhaps you could explain where theory came from that cant solder small dies because of thermal cycling? It certainly did not come from paper in OP. That paper linked in OP is 7 years ago, ie research would be 8-9 years ago, and is simply explaining failure mechanisms of BOTH large and smaller dies:
Quote:
n small-die form factors, center degra-
dation due to tensile stresses in the TIM
occurs and results in a degradation of the
IHS-to-TIM interface. Large-die degra-
dation is dominated by a combination
of tensile and shear stresses that cause
cracks to originate at the die corners at
the die-to-TIM interface.

Intel in many white papers, which back when I cared to read them and linked many in realtemp thread on xtreme...had stated reasons for developing solder tim, and b/c of expense was only used when specs could not be met with PTIM. Haswell and IVY because of low TDP, despite increased power density, under worst case (high ambients) would still easily meet specs. They also discussed they get lower yields with solder, ie solder failures, which again adds to expense.

Bottom line low TDP is going to have paste, unless specs cant be met with paste. High TDP if solder required, will have solder. In fact, even in article OP linked, it alluded to solder being developed only to meet specs...ie stock specs.

EDIT: my ivy 3770k is 8.1mm x 19.x mm. So smallest dimension is 8.1mm. Quick google search of solder attach on small dies....some companies think silicon dies 9m x9mm are large dies, and they think soldering such large dies as 9x9mm are more challenging than smaller ones. Here is one that uses a test die of 3.9 x 2.8 mm for solder die attaches, also explains why solder is so expensive, given process explanation.
http://www.cost602.ipm.cz/Oberndorff.pdf
Edited by opt33 - 6/8/13 at 5:07pm
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post #14 of 15
Quote

Yes, Haswell has thermal paste, but from Very Authoritative People, the TIM is not the problem. As has been posited across the net when people de-lid Ivy Bridge chips with great results, it’s really the black adhesive that’s the culprit. When you cut out that adhesive, it allows the IHS to sit closer to the CPU die, meaning there is less thermal paste through which the heat has to travel, leading to significantly lower temperatures. Intel’s TIM is really quite good, but the manufacturing process leads to that glue being just a little too thick, which is why you see such temperatures.

http://www.overclockers.com/3step-guide-to-overclock-intel-haswell
post #15 of 15
It's more than the TIM as others have said: AMD uses TIM on their APUs and you don't see them hitting high temps like 70-80°C at stock volts (basically up to 4.5Ghz) with a high end aftermarket cooler. They DO heat up though.

(http://www.overclock.net/t/1342268/pcw-trinity-has-the-ib-problem-thermal-paste-between-the-chip-and-ihs-delidding-results )
Edited by AlphaC - 6/9/13 at 8:53pm
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