Originally Posted by EniGma1987
Originally Posted by sdlvx
I've been asking around but I thought I'd ask you guys too since this might be relevant.
Hawaii is 24% larger die with 37% more shaders (as well as other parts greatly increases, but CUs/shaders are the largest part of the die).
Do you folks think AMD used HDL on Hawaii? Frequencies stayed the same as Tahiti or possibly a little slower. I've seen numbers between 800mhz and 1050mhz.
You don't just take libraries from one process type and node and apply them to something completely different. So no they did not use the high density libraries that are planned to use in Steamroller. Kaveri (Steamrolelr APU) uses a PD-SoI process node from Global Foundries, Tahiti and Hawaii use a Bulk process from TSMC. We also have no idea how dense the Tahiti die was in the shader processor area, AMD probably found many ways to refine the design which allows for more efficient use of die space and thus packing more things in. We also don't even know if the shader cores themselves are of the exact same design, maybe the cores had some optimizations that made them smaller
In the other places I asked about HDL and Hawaii, I was given the answer that Tahiti was not a dense design, mainly because 28nm was new and they wanted better yields. Remember when Tahiti was everywhere and Gk104 was impossible to find? It wasn't entirely because of demand, it was also because AMD could supply more Tahitis because they yielded better because they were less dense.
So it is entirely possible Hawaii is not using HDL at all, but instead is just packed more densely because 28nm is yielding much better.
But what you're getting at is HDL only works on specific nodes at specific fabrication processes?
Originally Posted by NaroonGTX
Competition to keep the prices low? AMD's prices are already low and they are fairly competitive. People like to romanticize about things, but here's a friendly reminder of the prices AMD had when they were putting out chips that blew Intel's away or were otherwise very competitive:
And that's not even mentioning the ORIGINAL FX chips that were targeted at gamers. Sure, they put out great performance, but they were overpriced to hell and back... And look at what Intel has been charging since then as well, while they have the "performance crown", lol. As the market leader, Intel can charge whatever they want, and they have been getting away with it. But it doesn't matter, those $1000 chips aren't exactly a big source of revenue for them. I don't want to see the days of overpriced AMD CPU's return because as an AMD fan, I only buy their CPU's. AMD couldn't price gouge with their chips even if they wanted to, especially not after the Bulldozer fiasco. Their reputation is still damaged from that.
As for APU's with three or four modules, this is technically possible, it's actually possible with 28nm. The die size would be pretty big though. AMD is targeting the 45/65W range for Carrizo, which will be Excavator with HDL and a possible die-shrink down to 20nm. We definitely won't see any APU's with more than two modules because anything more would go beyond their target thermal envelope. FM2+'s target TDP is 95W max. Steamroller FX will probably be the last FX chip, whereas Excavator will be APU-only.
Yeah, but you're missing the huge point here, and it's that you could still buy X2 3800 for $350 and then OC it past 4800 levels. Intel has completely killed the concept of this except for the 3930k to SB EE and 4930k to IB EE steps in their product line up.
AMD would more than likely keep their low end chips overclockable, something Intel has completely killed off. Which means that yeah, we might end up paying $350 for an AMD is it comes in and blows the pants off of what we're used to seeing, but you won't be paying for something you can't do yourself.
If you don't believe me, look at FX 8320. There is no way Intel would allow a product like that in their line-up, where it is released at the same time as the higher SKU part and the only difference is stock clocks while both have all the overclocking and instruction-set features enabled.
Back in the day, you could also buy cheaper P4 models and OC them just fine.
I think the point is not so much that AMD will bring prices down across the board, but that they will hopefully save overclocking from Intel's greedy hands. All it would take is an FX 8520 SR/EX chip that would tie Intel in single thread and tie it in single and be fully unlocked at a price point of an Intel that isn't unlocked to slaughter Intel.
To put this entire thing into perspective, Intel already doesn't have an i5 chip that comes in at the price of FX 8320, and 4670k is basically twice as expensive. If AMD was significantly closer in performance with SR/EX and Intel would be in a really odd position where they'd have chips that competed with AMD in price but where unable to be overclocked while the AMDs could see 25%+ increases in clock speed.
That right there would seriously affect the landscape of CPUs right now. Intel would probably have to abandon their scheme of "you can only overclock on unlocked CPUs and those CPUs have features disabled, sometimes as extreme as instructions like TSX which would give massive performance gains."
Originally Posted by Kuivamaa
I still think the main issue with the approach of AMD is that it results in big dies. Intel makes way more chips per wafer. They also sell some i3 models at the same price AMD sell 8320s . This design also limits laptops to dual modules.
I am in agreement with you, which is why I don't see why AMD would settle for continuing with 315mm^2 4m/8c PD for the next year. Even if they just went for something like PD with HDL they would significantly reduce die size and increase profits.
I feel that PD is simultaneously broken and awesome at the same time. You can set up your PD so it is one module per core and you can see 40% increase in single thread performance. The chip, given its die size, is something really great. The problem is that there are design decisions which are holding it back.
It's been researched and conjectured elsewhere as to why this happens, but even before SR was announced a big theory was that the decoder was a bottleneck and that going one core per module would relieve that bottleneck.
If AMD could fix PD so that it saw the 40% increase in performance it sees when going 4m/4c and it managed to maintain the die size while maintaining that 40% increase in multi-thread, it would have a 315mm^2 die that would compete with Haswell-E and the die sizes would be similar (4930k is about 250mm^2 IIRC). It has potential but a lot of it is clearly wasted.