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post #3131 of 3492
Quote:
Originally Posted by FlailScHLAMP View Post

I don't think the inter connect would be too far out of ASUS's capabilities. They managed PCIe 3.0 on the sabertooth..

on the bright side, day off tomorrow and i finally got time to install my replacement kaveri.. hoping this one can atleast hold its clocks.

the HT is a special type of link, whereas the PCIe3.0 mod on the sabertooth was just an extra controller that combined the 32PCIe2.0 lanes from the NB that are usually used for graphics, and made them into 32PCIe3.0 lanes, wouldn't provide any gains for CPU>cards but could help with inter-card communication...

pretty much all the AMD processors have 4 HT links, AM3+ has only (I think) one enabled for the NB and FM2+ only has half of one enabled for the hub as the main PCIe is already on-chip. while these are similar in design to PCIe they are specialized for inter-processor communication and have extra components that PCIe doesn't have, so unfortunately you cant use standard PCIe for processor-to-processor or processor to the motherboard.
   
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post #3132 of 3492
HT and PEX are much like DP and HDMI. In most cases you can have HDMI to DP and DP to HDMI.

All the links in Kaveri can be Hypertransport and simply using a small conversion process to transition to PCIe. Hypertransport uses less power than PCIe but uses more pins.

Unfortunately this isn't the case as all the links on Kaveri that go out are PCIe.

4 x PCIe x8
1 x PCIe x4

2 x PCIe x8 -> PCIe 3.0 x16 or 2 PCIe 3.0 x8/x8
1 x PCIe x8 -> HDMI / DisplayPort / DVI
1 x PCIe x8 -> VGA / PCI / Ethernet / etc
1 x PCIe x4 -> UMI(connection to southbridge) / another PCIe x4
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post #3133 of 3492
Quote:
Originally Posted by Seronx View Post

4 x PCIe x8
1 x PCIe x4

oh that's right, the link for the hub was a 5th half-set, and the original 4 links are used for the 16xPCIe3.0 and the display interfaces...

so for 2P; the links used for the displays can be used instead to link the two ports, the hub could accept both half-links from each port, and there would be 2x16 PCIe3.0 lanes available for expansion,
4P; similar to 2P, but the links are split to each socket accordingly and one of the links used for the PCIe3.0 is used, leaving one or two hubs that accept 2 or 4 ports each, and 4x8 PCIe3.0 lanes for expansion.

will be interesting to see how AMD goes about this, if they will start making APU "opterons" at all, pretty sure FM2+ couldn't be used for this still due to the HT PCIe mode hardlock... a socket C32 successor maby...?
   
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post #3134 of 3492
Berlin which uses the FP3 BGA socket is the APU Opteron. There will be no 2P/4P option for Berlin.
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post #3135 of 3492
i've been toying with the thought of multi apu configurations and the possibility of amd going that route.

in theory from a consumer point of view, it would make more sense for the high end platform to be multi apu

as to control the power aspect and compatibility issue we see in the Vishera thread alot. FX-8 chip fitting in to boards that just cannot handle them.

glad my shaky understanding of the HT/PEX lanes isn't too far off.

i'm not saying it wont take work. but i dont think it is out side the realm of possibilities.
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post #3136 of 3492
Quote:
Originally Posted by FlailScHLAMP View Post

i've been toying with the thought of multi apu configurations and the possibility of amd going that route.

I'm sure AMD will go this route at some point for Opterons, but getting any current APU or any current APU socket, to work in a multiprocessor configuration just isn't going to happen. Existing APUs do not have the I/O for it, and there is no way for a third party to change such inherent capabilities.
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post #3137 of 3492
Quote:
Originally Posted by Blameless View Post

I'm sure AMD will go this route at some point for Opterons, but getting any current APU or any current APU socket, to work in a multiprocessor configuration just isn't going to happen. Existing APUs do not have the I/O for it, and there is no way for a third party to change such inherent capabilities.

it makes more sense for when the unified socket comes around.

but i'm not holding my breath, i don't see my FX-8 being replace as a workhorse any time soon LOL
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post #3138 of 3492
Quote:
Originally Posted by Blameless View Post

I'm sure AMD will go this route at some point for Opterons, but getting any current APU or any current APU socket, to work in a multiprocessor configuration just isn't going to happen. Existing APUs do not have the I/O for it, and there is no way for a third party to change such inherent capabilities.
multisocket processing configurations are possible with Kaveri.

hUMA is an evolution to ccNUMA which is used in modern Opterons. The feature to use ccNUMA through non-intergrated parts is still there as well.

Kaveri (standalone) = (Unified Physical and Virtual Addresses)
Kaveri + Bonaire = (Unified Physical and Virtual Addresses) + (Unified Virtual Addresses)
Kaveri + Kaveri + Kaveri = (Unified Virtual Addresses to each other Kaveri but internally all Kaveri's have (Unified Physical and Virtual Addresses))

Kaveri_00 =>
1 x PCIe x8 => Kaveri_01
1 x PCIe x8 => Kaveri_02

Is completely possible but the operating system needs to support it.
Edited by Seronx - 3/5/14 at 11:59pm
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post #3139 of 3492
Quote:
Originally Posted by Seronx View Post

multisocket processing configurations are possible with Kaveri.

hUMA is an evolution to ccNUMA which is used in modern Opterons. The feature to use ccNUMA through non-intergrated parts is still there as well.

Kaveri = (Unified Physical and Virtual Addresses)
Kaveri + Bonaire = (Unified Virtual Addresses)
Kaveri + Kaveri + Kaveri = (Unified Virtual Addresses)

Kaveri_00 =>
1 x PCIe x8 => Kaveri_01
1 x PCIe x8 => Kaveri_02

Is completely possible but the operating system needs to support it.

Even if technically possible, sacrificing the bulk of Kaveri's I/O to get a relatively slow and high latency interconnect between them of them isn't quite what I had in mind.
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post #3140 of 3492
Quote:
Originally Posted by Blameless View Post

Even if technically possible, sacrificing the bulk of Kaveri's I/O to get a relatively slow and high latency interconnect between them of them isn't quite what I had in mind.
PCIe 3.0 latency is sub-100 nanoseconds and x8 can move 128 Gbit/s(bi-directional).
Edited by Seronx - 3/6/14 at 12:14am
AMD FX ~Seronx
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FX-9800P Acer Wasp R7 M440 SK Hynix HMA41GS6AFR8N-TF 
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AMD FX ~Seronx
(16 items)
 
  
CPUMotherboardGraphicsRAM
FX-9800P Acer Wasp R7 M440 SK Hynix HMA41GS6AFR8N-TF 
Hard DriveHard DriveOptical DriveCooling
KINGSTON RBU-SNS8152S3128GG2 TOSHIBA MQ01ABD100 HL-DT-ST DVDRAM GUE1N Stock 
OSMonitorKeyboardPower
Microsoft Windows 10 Home Build 14393 Viewsonic XG2401 24 Hz-144 Hz Ducky Channel Shine 3 Stock 65W 
CaseMouseMouse PadAudio
Acer Exoskeleton Steelseries Rival 300 Razer Megasoma AMD-Realtek ALC255 
  hide details  
Reply
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