Originally Posted by TheReciever
This is the type of news I like to see on OCN, thanks OP
Remember, desktop graphics is actually a shrinking market due to the effective integration of graphics not just in the mobile space, but also with higher powered CPUs/APUs from Intel and AMD.
Basically APUs are cutting the segments higher because those gT 640s and HD 7730type GPUs aren't good enough.
The risk of falling behind is always there, but these foundries are used to being a process node behind the industry leader (Intel) and still being able to pull good profits. These foundries also get a significant cost break by adopting technology well after Intel has done the lion’s share of work (think optics, lithography, wafer handling, deposition, etc.) and monetary investment. Their motivation is to stay close, but not risk the bleeding edge. This is the opposite of what AMD did when they owned their own fabs, as their primary product competed directly with Intel. Now the GLOBALFOUNDRIES is on its own, it has slowed down its pace of next generation process technology introduction, much to AMD’s chagrin.
22/20 nm processes can pack the transistors in. Such a process utilizing planar transistors will have some issues right off the bat. This is very general, but essentially the power curve increases very dramatically with clockspeed. For example, if we were to compare transistor performance from 28 nm HKMG to a 20 nm HKMG product, the 20 nm might in fact be less power efficient per clock per transistor. So while the designer can certainly pack more transistors into the same area, there could be some very negative effects from implementing that into a design. For example, if a designer wants to create a chip with the same functionality as the old, but increase the number of die per wafer, then they can do that with the smaller process. This may not be performance optimized though. If the designer then specifies that the chips have to run as fast as the older, larger versions, then they run a pretty hefty risk of the chip pulling just as much power (if not more) and producing more heat per mm squared than the previous model.
Intel got around this particular issue by utilizing Tri-Gates. This technology allowed the scaling of performance and power that we are accustomed to with process shrinks. This technology has worked out very well for Intel, but it is not perfect. As we have seen with Ivy Bridge and Haswell, these products do not scale in speed as well as the older, larger 32 nm Sandy Bridge processors. Both of the 22 nm architectures start pulling in more power than the previous generation when clockspeeds go past 4.0 GHz. Having said that, the Intel 22 nm Tri-Gate process is exceptionally power efficient at lower clockspeeds. The slower the transistors switch, the more efficient they are. These characteristics are very favorable to Intel when approaching the mobile sector. This is certainly an area that Intel hopes to clean up in.
SMC and others are busy developing their own technology akin to Tri-Gates. These are called 3D Fin-FETs. The basic design and physics behind these structures are essentially the same, but Intel trademarked theirs first. The problem here is that we are still at least two years away from an effective implementation of FinFETs on any node from any pure-play foundry. So the GPU guys are looking at a new process node that will effectively shrink the transistors, but may not have the electrical characteristics they were hoping for. TSMC is not planning on opening up their 20 nm HKMG planar based lines until Q1/Q2 2014 with product being delivered in a Q3 timeframe. TSMC is ahead of the bunch so far with actually implementing a 20 nm line.
Until 20 nm HKMG becomes available for production, we are in for a wait. TSMC expects to be able to provide mass quantities of these parts by Q3 2014, but that is not entirely set in stone
Basically 20nm won't be a huge
improvement I guess and won't be until late 2014Edited by AlphaC - 10/23/13 at 6:06pm