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[Fudzilla] AMD outlines HSA push - Page 9

post #81 of 88
Quote:
Originally Posted by MrJava View Post

Rumour has it that AMD is designing ARM APUs as well. However, they will probably be custom silicon for a major customer like Google or Amazon.

It's not a rumor... AMD already stated that they will incorporate ARM's TrustZone via low-end Cortex. The ARM logic block will just be for hardware security.

http://www.anandtech.com/show/6007/amd-2013-apus-to-include-arm-cortexa5-processor-for-trustzone-capabilities
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post #82 of 88
Quote:
Originally Posted by SuperMudkip View Post

Well I'm in CIS (Computer Information Systems) not CS. I wouldn't say that there pushing it for our major, but for my specific degree I can only take Java or C#. At our school we don't have the Adv. Java yet, in which I need to have 3 hours of basic programming and 3 extra hours of Adv. Programming. I'm just thinking that I'll do C# next semester, then next Fall semester I will do Java (Just to have elective credits and have a extra programming language under my belt.)

Most programming jobs that I've seen require Java or C#, so both of those are good choices. I personally like C# the best, but both of them are very similar. If you know one, it's very easy to learn the other.
post #83 of 88
I'm talking ARM Cortex A57 + A53 + GCN + customer specific accelerators. I'm assuming its custom silicon because AMD have hinted at additional big wins for their semi-custom division.
http://www.hardwareluxx.com/index.php/news/hardware/cpu/28079-amd-developing-arm-apu-with-gcn-graphics.html
Quote:
Originally Posted by DuckieHo View Post

It's not a rumor... AMD already stated that they will incorporate ARM's TrustZone via low-end Cortex. The ARM logic block will just be for hardware security.

http://www.anandtech.com/show/6007/amd-2013-apus-to-include-arm-cortexa5-processor-for-trustzone-capabilities
post #84 of 88
Quote:
Originally Posted by sdlvx View Post

Yeah, I'm not sure why your school is pushing Microsoft specific software when the market is diverging rapidly. For my CS degree we did assembly in SPARC and x86, got familiar with MIPS, and coded in C, C++, Scheme, x86 ASM, SPARC ASM, some Lisp, etc. Not a single platform specific language really. I mean SPARC is kind of limited to SunOS but there are Linux distros for SPARC out there.

MS will never support AMD in their venture and I"m assuming that AMD is actually going to be competing with MS.

MS's response to Mantle on Xbone should make it clear that MS wants to protect their platforms as much as possible without letting others in. MS not supporting Mantle on Xbone doesn't mean that people won't use Mantle on Xbone anyways. Note how UE3 is getting Mantle support and Epic doesn't have any part in it.

MS will take this stance in the future. But everything I see AMD releasing competes with something MS already has. DirectCompute, DirectX, etc.

Look at how things work:

Developers ask for features that are alternates to MS technologies (Mantle instead of DirectX, HSA features instead of DirectCompute)
Developers start talking about Linux
Valve pushes Linux hard

We are about to see a war open up between Microsoft vs AMD, HSA foundation, consoles besides Xbone, and game developers like Valve.

You mean like Android vs Windows Phone vs iOS?

See how that went tongue.gif

Openframework wins out given enough developer support
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post #85 of 88
Thread Starter 
Quote:
Originally Posted by PostalTwinkie View Post

What? That is literally a quote from TSMC, they have even shown at conferences 20nm production wafers.

What in gods name kind of logic are you using?

"This isn't going to happen, because I said so....."

*Gets shown that he is wrong, by the company he said isn't going to do whatever it is*

"I still don't think so, because.....screw the police!"

Holy crap.......

It would have been one thing if you said they weren't, and I said they were, and you replied with what you did. It is entirely different when you say something, and I literally give you a quote showing the exact opposite, from the company that is doing it. I just don't even.......

Oh I see… Conferences…
Like AMD :
"AMD originally expected to start supplying its Heterogeneous System Architecture (HAS) Kaveri APUs in the second half of 2013, but according to the company's latest plans, the CPU maker will only provide two A10 and one A8 APU pilot production samples to its clients in December 2013, indicating that Kaveri APU-based PC products may have difficulties showing up in the retail channel before April 2014, the sources said."
http://www.techpowerup.com/187505/amd-kaveri-apu-delayed-to-1h-2014.html

Like NVIDIA:
“NVIDIA Exposes GPU Roadmap: Kepler Arrives 2011, Maxwell in 2013”
http://hothardware.com/News/NVIDIA-Exposes-GPU-Roadmap-Kepler-Arrives-2011-Maxwell-in-2013/

I gave you proof that only one Fab will produce 20nm and the majority of the first batch will go to Apple. Read the article again. It’s plain logic.
I am happy to hear your opinion which is based on facts not conferences and announcements that keep shareholders happy.
And how is “I don’t think so” so offensive to you? I just expressed an opinion.
post #86 of 88
Quote:
Originally Posted by anticommon View Post

From what I understand, HSA is shared memory between GPU and CPU, correct? If so what implecations does/will this have for people who use external GPU's? Is it possible we may see GPU's in a 'CPU' form where you have one socket for CPU, one for GPU, and shared DDR4/5 memory between them?

Maybe I'm just nuts though.rolleyes.gif

You don't have to use the IGP to render, you can just use it for compute no doubt.
Quote:
Originally Posted by KyadCK View Post

Performance per watt is awesome, but AMD did not gain performance per core at all. Not this generation anyway. They just took their new wattage and threw more shaders at the problem.

Actually, there was a small performance gain on GCN 1.1, why do you think a HD7790 is so close to a HD7850? Same with the R9 290X vs HD7970.
post #87 of 88
Quote:
Originally Posted by Brutuz View Post

Quote:
Originally Posted by anticommon View Post

From what I understand, HSA is shared memory between GPU and CPU, correct? If so what implecations does/will this have for people who use external GPU's? Is it possible we may see GPU's in a 'CPU' form where you have one socket for CPU, one for GPU, and shared DDR4/5 memory between them?

Maybe I'm just nuts though.rolleyes.gif

You don't have to use the IGP to render, you can just use it for compute no doubt.
Quote:
Originally Posted by KyadCK View Post

Performance per watt is awesome, but AMD did not gain performance per core at all. Not this generation anyway. They just took their new wattage and threw more shaders at the problem.

Actually, there was a small performance gain on GCN 1.1, why do you think a HD7790 is so close to a HD7850? Same with the R9 290X vs HD7970.

You mean why does the 1Ghz 896 core part perform similar to the 860Mhz 1024 core part?

1000 x 896 = 896000
860 x 1024 = 880640

Probably because it only has 10% fewer shaders and is clocked 16% higher. the 7790 actually has a higher GFLOPs value then the 7850, but also has only half the ROPS and memory bus.

As for the 290x, they kinda threw 40% more shaders at the problem (2048 to 2816) and double the ROPs (32 to 64) which we already knew was a bottleneck. That accounts for the entire performance gap. Any time the 7970 gets closer, it's almost always due to the 290x throttling.


And yes, I'm waiting for the day when APUs are the "CPU standard", not a CPU with GPUs on them. They are there to be compute monsters, they just aren't used that way yet.
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post #88 of 88
KyadCK,

The R9 290 also has 4x the ACEs.
Geometry processor and rasterizer were also doubled due to having 1 per shader engine rather that just 2 on the front end. Steamroller did the same for CPU-side, doubling the decode front end.

It's not just more shaders.

ref:
Quote:
Each shader engine has its own geometry processor and rasterizer, effectively doubling the primitive rasterization rate versus Tahiti.
http://techreport.com/review/25509/amd-radeon-r9-290x-graphics-card-reviewed
Quote:
There are a few tweaks to the design though, including device flat addressing to support standard calling conventions, precision improvements to the native LOG and EXP operations, and optimizations to the Masked Quad Sum of Absolute Difference (MQSAD) function, which speeds up algorithms for motion estimation. Incidentally, all of those features debuted alongside the Bonaire GPU

...
But the arrangement of AMD’s CUs is different. Whereas Tahiti boasted up to 32 Compute Units, totaling 2048 shaders and 128 texture units, Hawaii wields 44 CUs organized into four of what AMD is calling Shader Engines. The math adds up to 2816 aggregate shaders and 176 texture units.
...
Hawaii also employs eight revamped Asynchronous Compute Engines, responsible for scheduling real-time and background task to the CUs. Each ACE manages up to eight queues, totaling 64, and has access to L2 cache and shared memory. In contrast, Tahiti had two ACEs. The Kabini and Temash APUs we wrote about earlier this year come armed with four. Why is Hawaii so dramatically different? Some evidence exists to suggest that Hawaii’s asynchronous compute approach is heavily influenced by the PlayStation 4’s design, though AMD won't confirm this itself. Apparently, Sony’s engineers are looking forward to lots of compute-heavy effects in next-gen games, and dedicating more resources to arbitrating between compute and graphics allows for efficiencies that weren’t possible before.


Tahiti’s front-end fed vertex data to the shaders through a pair of geometry processors. Though its quad Shader Engine layout, Hawaii doubles that number, facilitating four primitives per clock cycle instead of two. There’s also more interstage storage between the front- and back-end to hide latencies and realize as much of that peak primitive throughput as possible.

In addition to a dedicated geometry engine (and 11 CUs), Shader Engines also have their own rasterizer and four render back-ends capable of 16 pixels per clock. That’s 64 pixels per clock across the GPU—twice what Tahiti could do. Hawaii enables up to 256 depth and stencil operations per cycle, again doubling Tahiti’s 128. On a graphics card designed for high resolutions, a big pixel fill rate comes in handy, and in many cases, AMD claims, this shifts the chip’s performance bottleneck from fill to memory bandwidth.


The shared L2 read/write cache grows from 768 KB in Tahiti to 1 MB, divided into 16 64 KB partitions. This 33% increase yields a corresponding bandwidth increase between the L1 and L2 structures of 33% as well, topping out at 1 TB/s.
http://www.tomshardware.com/reviews/radeon-r9-290x-hawaii-review,3650.html
Edited by AlphaC - 11/13/13 at 12:03pm
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