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post #311 of 349
Quote:
Originally Posted by The_Manual View Post
Processors based on the Intel Pentium 4 and AMD XP design all contain a 64 bit Bus Width, as the screenshot shows, as do all the later processors. Many processors before these also ran on the 64 bit Bus Width system. You will need to go far back to hit the 32 bit Bus Width processors
Then what about Core Duo (32bit). Also, what are they referring to when they compare Windows XP vs Windows XP 64 bit edition.

I was under the understanding that the Core 2 Duo is capable of 64 bit, however it is not used in 64 bit.
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post #312 of 349
Ah, that is where you're understanding is impaired

We class a chip as 32, or 64 bit (or less/greater). That does not specify certain aspects of the chip itself.

We can look at Core 2 Duo for Example:

32 bit Micro-Processor.

Supports 64 bit Emulation Instructions (x86-64) Via EM64T.

Supports 64 bit Data Bus Bandwidth System.

Supports 128 bit SSE data junction transfer, and processing.

Supports 256 bit Level 2 Cache Width


You are confusing the x86 data instruction processing with different aspects of the system
post #313 of 349
Quote:
Originally Posted by The_Manual View Post
Ah, that is where you're understanding is impaired

We class a chip as 32, or 64 bit (or less/greater). That does not specify certain aspects of the chip itself.

We can look at Core 2 Duo for Example:

32 bit Micro-Processor.

Supports 64 bit Emulation Instructions (x86-64) Via EM64T.

Supports 128 bit SSE data junction transfer, and processing.

Supports 64 bit Data Bus Bandwidth System.


You are confusing the x86 data instruction processing with different aspects of the system
Okay, so the width of the FSB is 64 bit (8 byte).

So to revise my math:


In order to calculate FSB bandwidth you multiply bus frequncy (266.66) times the transfers per clock as you said (4) and the FSB width (64bit or 8 byte).

Therefore, a system with a 266.66Mhz FSB (stock Core 2 Duo) has a FSB bandwidth of:

266.66 x 4 x 8 = 8533.33MB/s

Your memory has a 64bit (8 byte) width and a capability of 2 transfers per clock (DDR).

Therefore, to flood the FSB bandwidth you get:

8533.33MB/s = X Mhz * 2 * 8
8533.33MB/s = X Mhz * 16
533.33Mhz = X

Therefore a memory bus speed of 533.33Mhz or DDR2-1066 will flood the FSB bandwidth.
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post #314 of 349
I know this is off topic, but so have the last 30 pages.

Paul did you reach 3.6 yet. I can reach it fine and have been 21h stable. But, I get that "slowdown" you experience, cuts my fps in about half.
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post #315 of 349
Quote:
Originally Posted by Intervention View Post
I know this is off topic, but so have the last 30 pages.

Paul did you reach 3.6 yet. I can reach it fine and have been 21h stable. But, I get that "slowdown" you experience, cuts my fps in about half.
HEHE... P5B Deluxe crapped itself. ASUS was eager to get it back. I think they are aware of a problem.

I am shopping for a new motherboard. I may keep the new P5B they send me or get a D975XBX2 / Abit AB9 QuadGT / ASUS Commando.
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post #316 of 349
Quote:
In order to calculate FSB bandwidth you multiply bus frequncy (266.66) times the transfers per clock as you said (4) and the FSB width (64bit or 8 byte).

Therefore, a system with a 266.66Mhz FSB (stock Core 2 Duo) has a FSB bandwidth of:

266.66 x 4 x 8 = 8533.33MB/s

Your memory has a 64bit (8 byte) width and a capability of 2 transfers per clock (DDR).

Therefore, to flood the FSB bandwidth you get:

8533.33MB/s = X Mhz * 2 * 8
8533.33MB/s = X Mhz * 16
533.33Mhz = X

Therefore a memory bus speed of 533.33Mhz or DDR2-1066 will flood the FSB bandwidth.
Correct mathematically

1066MHz DDR2 will equate to 1066MHz QDR mathematically. However the bandwidth that the memory is capable of is drastically impaired in reality by Transfers made to other components, other than the CPU

Mathematically correct, but to maintain an equal data transfer you will need about 1500MHz memory to compensate for this Bandwidth (CPU).

You can see this in reality. If you operate you're chip at 1066MHz, with 1066MHz DDR2 Memory you will only get approximately 7GB/s worth of bandwidth. The missing ~1.5GB accounts for data transferred to other locations, but not to the Central Processing Unit.
post #317 of 349
Quote:
Originally Posted by The_Manual View Post
Correct mathematically

1066MHz DDR2 will equate to 1066MHz QDR mathematically. However the bandwidth that the memory is capable of is drastically impaired in reality by Transfers made to other components, other than the CPU

Mathematically correct, but to maintain an equal data transfer you will need about 1500MHz memory to compensate for this Bandwidth (CPU).

You can see this in reality. If you operate you're chip at 1066MHz, with 1066MHz DDR2 Memory you will only get approximately 7GB/s worth of bandwidth. The missing ~1.5GB accounts for data transferred to other locations, but not to the Central Processing Unit.
This is also assuming 100% efficiency (1-1-1-0-1T) of the ram. The latencies impair the ram's real bandwidth a bit further.
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post #318 of 349
Quote:
Originally Posted by Ihatethedukes View Post
This is also assuming 100% efficiency (1-1-1-0-1T) of the ram. The latencies impair the ram's real bandwidth a bit further.
Latencies are small.
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post #319 of 349
I've been trying to follow on all this math, but have gotten a little lost.

Just how small is 1 "latency". It is only one clock cycle, correct. So the latency is so small, it really makes almost no difference?
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post #320 of 349
Quote:
Originally Posted by Intervention View Post
I've been trying to follow on all this math, but have gotten a little lost.

Just how small is 1 "latency". It is only one clock cycle, correct. So the latency is so small, it really makes almost no difference?
DDR2-800 does 800,000,000 cycles per second. Latencies of 5-5-5-15 add up to 30 cycles per operation of latency.
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