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[noticias3d] Kaveri Benchmarking Developing... - Page 9

post #81 of 112

What if Kaveri IPC was lower then expected? well i will cast spell Bladestorm

 

/target AMD
/charge
/Bladestorm
/cleartarget

 

:D

post #82 of 112
You forgot /cancelaura if amd tries to kite you and /castPiercingHowl for the slow
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post #83 of 112
Quote:
Originally Posted by Xuper View Post

What if Kaveri IPC was lower then expected? well i will cast spell Bladestorm


/target AMD
/charge
/Bladestorm
/cleartarget



biggrin.gif

You can abbreviate it to /tar AMD tongue.gif, also you might wanna hamstring first biggrin.gif
Quote:
Originally Posted by LuckyStarV View Post

Cinebench 11.5 is SSE2 and 15 is SSE3 I think

Each phenom core has 2 128bit FPU's for 8 total in a quad core. Bulldozer et al have only 2 128bit fpu's per module for 4 total.

I am pretty certain that each stars core has a single 128bit FPU.
Edited by Kuivamaa - 1/13/14 at 3:48pm
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post #84 of 112
Quote:
Originally Posted by Kuivamaa View Post

You can abbreviate it to /tar AMD tongue.gif, also you might wanna hamstring first biggrin.gif
I am pretty certain that each stars core has a single 128bit FPU.

Lol WoW macro was priceless
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post #85 of 112
Quote:
Originally Posted by Kuivamaa View Post

You can abbreviate it to /tar AMD tongue.gif, also you might wanna hamstring first biggrin.gif
I am pretty certain that each stars core has a single 128bit FPU.

They have at least 2. AMD was hoping for FMA/SSE4/AVX/HSA(in APU's) to boost their FPU output despite less FPU units. Unfortunately, newer coede still isn't as widely adapted as AMD was hoping.

http://www.anandtech.com/show/4955/the-bulldozer-review-amd-fx8150-tested/2
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post #86 of 112
Where did you see stars cores having 2x128bit FPU each?
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post #87 of 112
From my link before from Anand
Quote:
Compared to a quad-core Phenom II, AMD's eight-core (quad-module) FX sees no drop in floating point execution resources. AMD's architecture has always had independent scheduling for integer and floating point instructions, and we see the same number of execution ports between Phenom II cores and FX modules. Just as is the case with the integer cores, the shared FP core in a Bulldozer module has larger scheduling hardware in front of it than the FPU in Phenom II.

So each Bulldozer mdoule has 2 FPU. Bulldozer Module = Phenom Core in terms of FPU count. Therefore, each Phenom core has 2 FPU's.

One ADD and one MUL FPU. Bullderzoer supports FMA which is why it's FPU units are FMAC (Fused Multiply ADD).

560px-AMD_K10_Arch.svg.png
Edited by LuckyStarV - 1/13/14 at 4:44pm
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post #88 of 112
Nvm
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post #89 of 112
Yeah half the FPU's is a sad thing but it is quite good we can achieve this much with only 4 of them. More importantly floating points will be ditched at the point where the gpu takes that part of the processing.
.

That pic described the story of the APU I suppose. (besides the point where it is sluggish like the older versions of IE)
post #90 of 112
I think you misinterpreted what anand wrote. A stars core (thuban,deneb,propus etc) has a single 128bit FPU per core, 6 in total for a thuban. Each BD module has two cores and two 128bit FPU, 8 in total for FX-8xxx series. The only instance where bulldozer derivates have only 1 FPU per module is for AVX workloads where both 128bit units in a module are combined. This is irrelevant for the comparison since stars family lacks AVX.
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