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[ExtremeTech] AMD’s next-gen Carrizo APU features leaked, shows greater focus on power efficiency

post #1 of 70
Thread Starter 
Quote:
Carrizo will be AMD’s first APU to implement a full Fusion Control Hub (FCH) — what we used to call a “south bridge” — on-die, but it’s doing so at some cost to overall features. The FCH will be a stripped-down variant, with two SATA 6G ports, four USB 3.0 ports, and four USB 2.0 ports. This will only apply to mobile variants — drop a Carrizo APU into the FM2+ socket, and the onboard FCH will disable itself while the motherboard FCH takes over.

Up until now, all AMD’s southbridges have been built on 65nm. Bringing the FCH on-die means that Carrizo will save a few precious watts for mobile form factors in that fashion, while slashing the total feature size cuts die size and power consumption without boosting the APU’s physical area much.
Quote:
The one potential downside, if this current version of the document is accurate, is that AMD is sharply cutting the number of available PCI-Express lanes. Carrizo increases all of its general purpose lanes to PCI-Express throughput, but it cuts the number of total lanes to 16, down from 24. For those of you following along at home, that means Carrizo motherboards will be limited to a single PCI-Express x8 lane for graphics, or two lanes that are electrically x4. There won’t be any simple way for a company to dodge that limit — not without implementing every other feature over alternate busses and dedicating the PCI-Express lanes solely to graphics.

If that actually happens, it could hurt AMD’s status in the enthusiast community if the news isn’t managed right. The truth is, a single PCIe 3.0 lane at x8 is likely enough for any single GPU — it’s only in multi-GPU configurations that such a configuration is likely to hurt. Here, AMD may simply be pragmatic — not many of its APU users are likely opting for multi-GPU configurations anyway. Depending on the clock speeds and performance advantages Carrizo can hit, it simply may not make sense for Kaveri owners or FX users to consider the chip as an upgrade, while the low-power Steam Machines of the world would be perfectly happy on an x8 slot.

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post #2 of 70
Kaveri will be the most efficient chip troughout 2014 at low clocks and Carrizo probably for 2015.
Some are going to be bumped out by the reduction in Pci-e lanes but this is a all in one platform or budget gaming platform so it is very understandable.
post #3 of 70
I don't see the downsides to having only 16 lanes of PCI Express.

I'm currently running a 6950 on 8 lanes of 2.0 and no bottleneck or performance reduction to be found.

Why would anyone even want or need more than 8 lanes of 3.0 on a Carrizo APU?
   
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post #4 of 70
Quote:
Originally Posted by Artikbot View Post

I don't see the downsides to having only 16 lanes of PCI Express.

I'm currently running a 6950 on 8 lanes of 2.0 and no bottleneck or performance reduction to be found.

Why would anyone even want or need more than 8 lanes of 3.0 on a Carrizo APU?


im sure HARDOCP did a 2.0 vs 3.0 benchmark test and the results were pretty much similar.
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post #5 of 70
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As of right now you don't need more than 8 lanes of 3.0 on a APU but since AM3+ and FX are the last of their kind our eyes have turned to FM2+ as a future replacement. This just indicates to me that AMD intends on this chip competing with an i3 as usual. APU's really need to move past that point, and if this is the top of the line chip for FM2+ AMD has nothing to offer the enthusiast market. By that I mean, i5-i7, not the Intel-E market.

It would really make sense though if they have a 3-4 module APU with support for more lanes specifically designed for desktops in the works but I doubt it. I'm pretty sure we would see that on servers first and the roadmaps don't support it.
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post #6 of 70
Quote:
Originally Posted by Papadope View Post

As of right now you don't need more than 8 lanes of 3.0 on a APU but since AM3+ and FX are the last of their kind our eyes have turned to FM2+ as a future replacement. This just indicates to me that AMD intends on this chip competing with an i3 as usual. APU's really need to move past that point, and if this is the top of the line chip for FM2+ AMD has nothing to offer the enthusiast market. By that I mean, i5-i7, not the Intel-E market.

It would really make sense though if they have a 3-4 module APU with support for more lanes specifically designed for desktops in the works but I doubt it. I'm pretty sure we would see that on servers first and the roadmaps don't support it.

Soon as you drop it in a FM2+ motherboard,the on-chip southbridge is disabled and it uses the features of the motherboard. Thus it has no bearing on the i5/i7 comparison.Besides they don't have a full set of PCI-E lanes either.thumb.gif
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post #7 of 70
Interesting. I do wonder if they're gonna step their game up with Multi-GPU config performance.
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post #8 of 70
I personally think AMD is going to get crushed between Intel on the high side, and ARM on the bottom.

I just can't see buying AMD at all anymore.

Time will tell I guess.....
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post #9 of 70
Quote:
Originally Posted by gsa700 View Post

I personally think AMD is going to get crushed between Intel on the high side, and ARM on the bottom.

I just can't see buying AMD at all anymore.

Time will tell I guess.....

Even though AMD and ARM are working closely together...
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post #10 of 70
Quote:
Originally Posted by opty165 View Post

Even though AMD and ARM are working closely together...

Doesn't that kind of make my point?
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Overclock.net › Forums › Industry News › Rumors and Unconfirmed Articles › [ExtremeTech] AMD’s next-gen Carrizo APU features leaked, shows greater focus on power efficiency