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[BSN] ADATA Launches DDR4 for Haswell-E and Haswell-EP, Details Clocks Latency - Page 4

post #31 of 35
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post #32 of 35
On a sidenote, it really sucks that Carrizo's iGPU computing potential is going to be stuck between a rock (pathetic DDR3 limitations) and a hard place (DDR4's insane prices and relatively puny performance due to it being new tech) in the near future. By the time the memory bandwidth needed to saturate AMD's APUs reaches mainstream price levels, it may be too late. jealoussmiley.gif

On a completely different sidenote, what do you guys think will be the dominant next-gen memory tech will be? Will DDR4 continue to take DDR3's ubiquitous market share, or will 3D stacked memory finally break into the mainstream with its enormous potential? Or maybe GDDR will come way out of left field and completely obliterate the competition???
     
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post #33 of 35
Quote:
Originally Posted by MrLinky View Post

No wonder they didn't reveal latency, CL 90 would probably scare most customers away. biggrin.gif

if latency is reduced overall, then CL should be within a factor of 2 of DDR3

remember CL2 DD1-400 has the same effective latency as CL4 DDR2-800, CL8 DDR3-1600 and CL16 DDR4-3200
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post #34 of 35
They did reveal timings, or at least the CL, it's 15 and it's right in the part number listed. Search for it and you will get confirmations.

Anyway, DDR4 has more ranks per DIMMs and this means better interleaving which means better performance, but it's still not going to make DDR4-2133 CL15 faster than DDR3-2133 CL11.
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post #35 of 35
Cool stuff.
Does anyone know whether we will see Micron's HCM on Volta ? I think that it would be great for Nvidia and Micron to work closely together through cross licensing as the target market focus has a very nice overlap, not to mention eliminating bottlenecks between cpu and gpu. Nvlink would probably work well with any parallel processing chip developed together IBM/Nvidia/micron.
Should bode well for desktops, eventfully, once it filters down from HPC, distributed computing and supercomputing environment.
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