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[VC] AMD: No 20nm GPUs this year - Page 13

post #121 of 146
Quote:
Originally Posted by Alatar View Post

The reason hawaii is so small is because it's so dense. Making it bigger and less dense wont help performance. If you want more performance you need to go bigger with the same density.

Except in the case of Hawaii where it throttles due to thermals though, yes? If you can cool it more efficiently, then it can run at its designed clock rate more of the time.

Whether that's worth getting fewer chips out of each wafer is something I'd highly doubt, but there is a logic to inflating them for thermals.
post #122 of 146
Well I was assuming no thermal throttling because that just complicates things and doesn't really matter that much for enthusiasts.
 
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post #123 of 146
Quote:
Originally Posted by Alatar View Post

Well I was assuming no thermal throttling because that just complicates things and doesn't really matter that much for enthusiasts.

I'm not sure it's going to be a realistic assumption moving forward though. Sure, cooling is great, but my gut is telling me that moving forward we're going to end up power-limited, either on supplying it or exhausting it. The what I consider peculiar thermal design of Hawaii seems to speak to this, and Maxwell's focus on efficiency and scaling speaks to it even more.
post #124 of 146
Of course I'm not arguing no company would make their chips more expensive just for less density just saying it could be less dense.
Either way being dense is more of a gift than something that is bothersome an Hawaii scaled up with the same density and 550mm^2 would be a monster if cooled alright.
post #125 of 146
Quote:
Originally Posted by KarathKasun View Post

No. Vanilla 20nm is mobile SoC focused, hence LPM (Low Power Mobile) designation.

Every process has slight chemistry tweaks to adjust where on that slope it falls into. And with 20nm, the window of opportunity is moving down toward the low voltage end of the spectrum. Power densities are getting to the point where you can't maintain the same power output with the same number of transistors because of heat dissipation issues. So as of now, until something big changes (non planar transistors), you lose as much in clock speeds as you gain from additional transistors.

We are closing in on the physical limits of current semiconductor manufacturing technology (10nm or so).



This is a TSMC slide from 2013, supposedly they have a high performance 20nm process that's ready even before the SoC version was ready.
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post #126 of 146
The newer (afaik) roadmap is this one:

 
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post #127 of 146
Quote:
Originally Posted by awdrifter View Post



This is a TSMC slide from 2013, supposedly they have a high performance 20nm process that's ready even before the SoC version was ready.

Alatar is right, the slide you're showing is from 2011. Look on the left down corner.

2012 bring us a new roadmap with 20-SOC only :



http://www.armtechforum.com.cn/2012/10_TSMC.pdf
Edited by Olivon - 4/23/14 at 1:18am
post #128 of 146
Quote:
Originally Posted by Olivon View Post

2012 bring us a new roadmap with 20-SOC only :


And 2013 brought us "let's shut up because we jump the gun".
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post #129 of 146
http://www.techpowerup.com/120504/amd-to-switch-to-globalfoundries-with-28-nm-gpus.html
http://www.xbitlabs.com/news/graphics/display/20100419141543_ATI_to_Build_28nm_Graphics_Chips_at_Globalfoundries.html
http://news.softpedia.com/news/Globalfoundries-to-Make-AMD-s-28nm-GPUs-140270.shtml

I would not trust the heads of AMD with any consistency.

Even though certain AMD Vice Presidents say AMD will transition to 20nm then to FinFETs.

Under the research and development team side you only see;
"FDSOI, FDSOI, FDSOI, FDSOI, FDSOI, FDSOI, FDSOI, FDSOI, FDSOI, FDSOI, FDSOI, FDSOI, FDSOI, FDSOI, FDSOI, FDSOI, FDSOI, FDSOI, FDSOI, FDSOI, FDSOI, FDSOI."

If the next Volcanic Island suite of GPUs are shipping right now, it places them in the 28nm FDSOI timeline. 28nm-SHP which Kaveri uses, the only successor to it (via Moore's Scaling and Dennard's Scaling) is 14nm FDSOI.

With 28nm FDSOI, AMD will get a small ~11% increase in transistor density. While getting up to a 30% frequency increase for devices.

Here is the roadmap;

FD Next = 14nm FD

The boxes are described as such; Risk begins at the beginning edge then Volume begins at the end edge.
---
tl;dr: AMD will not be using 20nm-LPM and 14nm FinFETs, but instead FDSOI.

---
Ultra Last Minute edit;

Hawaii for example; lets say Maui is the XTX version on GloFo's 28nm FDSOI node.

Hawaii = ~1.0 GHz for core speed and ~5 GHz for memory speed. 438 mm² which is the die size.

Maui, would then be: Up to ~1.3 GHz for core speed and up to ~6.5 GHz for memory speed. 390 mm² which could be the die size.

The two would be in the same TDP bracket: 290 Watts.
Edited by Seronx - 4/23/14 at 3:22am
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post #130 of 146
AMD will contine to use TSMC services regarding GPU in next iteration IMHO.
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