Source: Kitguru
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Source: Semiaccurate
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VISC Architecture Tech briefing
We need this for more competition.
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Soft Machines, a startup that develops microprocessor technologies, has unveiled its own VISC processor architecture. The developer claims that VISC can increase processor's average number of instructions executed per each clock cycle (instructions per cycle, IPC) by three or four times, thus increasing performance performance-per-watt by two or four times in single- and multi-threaded applications compared to existing microprocessors.
There is a number of ways to boost performance of a central processing unit (CPU), but the most obvious are: to boost its frequency, to increase the number of processing cores, to improve IPC execution. Amplified clock-rates advance performance in single-threaded applications and have little effect on multi-threaded applications; increased amount of cores boosts performance in multi-threaded programs, but has no effect on single-threaded apps; improved IPC brings benefits to all programs, but in the recent years the growth of IPC has been very slow. Tangible improvements of IPC requires addition of new hardware into every core of a multi-core CPU, which makes designs bigger and more expensive.
Soft Machines has no plans to produce VISC processors itself, but it intends to license technology to those, who can use it.
Soft Machines was established around 2007 and since then has got $125 million from various companies and organizations, including AMD, GlobalFoundries, Samsung as well as govern-ment investment funds from Abu Dhabi (Mubadala), Russia (Rusnano and RVC), and Saudi Arabia (KACST and Taqnia). Sanjay Jha, chief executive officer of GlobalFoundries, is the chairman of Soft Machines. At present Soft Machines has more than 250 employees and 75+ issued patents.
At present VISC processor proof-of-concept prototype can run Linux operating system and boot Android.
Source: Semiaccurate
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So how does it do in practice? Since Soft Machines has a prototype chip they should have numbers, right? The company gave a demo of that part running the EEMBC RGB-CMYK DENBENCH benchmark against a 2C A15@1.7GHz (Exynos 5250), a 1C Hasswell@1GHz(3550M), and a Baytrail Atom@1.86GHz (Z3470). The Soft Machines Dual V-Core Test chip had 1MB of L2 and won the benchmark as you can see below. Test times are in minutes, lower is of course better.
At least on this benchmark, the Soft Machines architecture works well. The company claims it will draw between 1/4 and 1/2 the power or run at ~2x the performance of competing architectures across a variety of benchmarks. They showed a wide range of numbers on one slide including SPEC 2000, SPEC 2006, EEMBC DE, Kraken, and of course Dhrystone all against an A15. Needless to say they won by large margin on the low-end, a large multiple in a few cases.
The important thing to note is that the Soft Machines core has a much higher IPC than the others, and by much we mean a multiple. If you look at the test results above, the slowest of the competition is running at 1GHz, the VISC chip was running at a mere 350MHz and finished significantly faster. If only the Soft Machines core could run at clocks of four digits, that would be really impressive.
VISC Architecture Tech briefing
We need this for more competition.