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Gigabyte x99 SOC Champion Discussion\Owners's Club - Page 55

post #541 of 1438
Quote:
Originally Posted by Blameless View Post

I haven't had any stability/reliability issues with my SOC Champion. However, I am not at all convinced manipulation of the VLs is safe in the long term. I killed the uncore on one 5820K with clocks and volts that most would have considered safe.

So...I currently run my board with the OC socket physically switched off.
Same.
Around 1.9 vinput with "medium" LLC has been the sweet spot for both of my 5820K samples.

Thanks Blameless, what frequencies are you running your 5820k at with that input voltage,??
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post #542 of 1438
Quote:
Originally Posted by lilchronic View Post

These chips degrade very easy when pushing cache frequency and voltage. There have been cases not only on this board but the RVE as well.

That's a very broad statement, surely it depends on what cache frequencies and voltages are being pumped through the silicon, if you need high voltages to run a high cache then yes you are asking for trouble, good samples can run high cache frequencies at relatively low volts, at the moment I am running my cache at 4.2ghz with 1.17v, running AIDA64 cache stress test for 4+ hours without problems, and xtu, realbench etc fully stable.
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post #543 of 1438
Quote:
Originally Posted by moorhen2 View Post

Thanks Blameless, what frequencies are you running your 5820k at with that input voltage,??

I ran my first sample at 4.2GHz and my current one is at 4.3GHz, but I've been limiting clocks and voltages in the interest of surviving unconditionally stable settings (no omitting AVX2/FMA3 stress tests because they utilize the architecture too well).

Both parts did about 200MHz more in lighter tests like Realbench or x265, same input voltage.
Quote:
Originally Posted by moorhen2 View Post

good samples can run high cache frequencies at relatively low volts, at the moment I am running my cache at 4.2ghz with 1.17v, running AIDA64 cache stress test for 4+ hours without problems, and xtu, realbench etc fully stable.

Stress test stable settings don't imply safe settings.

My first sample's uncore showed signs of degradation with the uncore being run at 4-4.2GHz with 1.1 to 1.15 vring, +0.04 VCCSA, and 1.37-1.41 VL6. It was stable for well over a month of heavy use...then memory training errors started to crop up, then stress tests started to fail without extra voltage being applied. A about a month after I started to notice problems the part needed 1.2 vring, +0.2 vccsa, and 1.4 VL6 just to POST at stock 3.3GHz cache.

Cores themselves never showed any signs of degradation, and passed every core specific workload I threw at them, with the same vcore (1.245) I had used for six months in my ASrock board and two months in my SOC Champion.
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post #544 of 1438
Quote:
Originally Posted by Blameless View Post

I ran my first sample at 4.2GHz and my current one is at 4.3GHz, but I've been limiting clocks and voltages in the interest of surviving unconditionally stable settings (no omitting AVX2/FMA3 stress tests because they utilize the architecture too well).

Both parts did about 200MHz more in lighter tests like Realbench or x265, same input voltage.
Stress test stable settings don't imply safe settings.

My first sample's uncore showed signs of degradation with the uncore being run at 4-4.2GHz with 1.1 to 1.15 vring, +0.04 VCCSA, and 1.37-1.41 VL6. It was stable for well over a month of heavy use...then memory training errors started to crop up, then stress tests started to fail without extra voltage being applied. A about a month after I started to notice problems the part needed 1.2 vring, +0.2 vccsa, and 1.4 VL6 just to POST at stock 3.3GHz cache.

Cores themselves never showed any signs of degradation, and passed every core specific workload I threw at them, with the same vcore (1.245) I had used for six months in my ASrock board and two months in my SOC Champion.

Nothing is safe when we choose to overclock, it's the risk we take, but we do it anyway, so when things need more juice to do the same thing it goes with the territory I'm afraid, but this is OCN after all. smile.gif
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post #545 of 1438
Hi guys,

I need an Help!

I've closed firestrike @4.7/4.0 at 1.38V without problems with this setting:

BCLK 100
CORES 47
UNCORES 40


VCCIN 1.9
VCORE 1.379
VRING 1.15
VSA +0.25
VCCIO 1.15
PCH 1.5
PCH CORE 1.05

VRIN 600KHZ
DDRAB 500KHZ
DDRCD 500KHZ

VRIN LLC EXTREME
VRIN OCP EXTREME
VL4 1.37
VL5 1.48
VL6 1.45


I need to close Firestrike @4.8ghz but over 4.7 doesnt' finish it (any vcore)

What can I do? Thanks!
post #546 of 1438
Thread Starter 
Quote:
Originally Posted by EDORAM View Post

Hi guys,

I need an Help!

I've closed firestrike @4.7/4.0 at 1.38V without problems with this setting:

BCLK 100
CORES 47
UNCORES 40


VCCIN 1.9
VCORE 1.379
VRING 1.15
VSA +0.25
VCCIO 1.15
PCH 1.5
PCH CORE 1.05

VRIN 600KHZ
DDRAB 500KHZ
DDRCD 500KHZ

VRIN LLC EXTREME
VRIN OCP EXTREME
VL4 1.37
VL5 1.48
VL6 1.45


I need to close Firestrike @4.8ghz but over 4.7 doesnt' finish it (any vcore)

What can I do? Thanks!

You can try more VCCIN that might help stabilize your OC. I had a 5820K that needed 2.05 VCCIN @ 1.35vcore and another that needed only 1.9vccin @ 1.35 vcore, Just have to play around with it and see if your chip likes higher vccin. thumb.gif
post #547 of 1438
Quote:
Originally Posted by lilchronic View Post

You can try more VCCIN that might help stabilize your OC. I had a 5820K that needed 2.05 VCCIN @ 1.35vcore and another that needed only 1.9vccin @ 1.35 vcore, Just have to play around with it and see if your chip likes higher vccin. thumb.gif


Ok I'll try 2.05vccin, what's the max value?

Vccin required changes with vcore?

thanks.
post #548 of 1438
Using the new F4m firmware. Haven't tested sleep yet, but in other ways it seems at least as good as F4i and F4l. No issues so far.
Quote:
Originally Posted by EDORAM View Post

Ok I'll try 2.05vccin, what's the max value?

2.05v is already past what I'd ever use long term, especially with such a high LLC value.
Quote:
Originally Posted by EDORAM View Post

Vccin required changes with vcore?

In my experience:

More current draw (higher clocks and or heavier loads) = more relative VCCIN needed.

More vcore (and often other voltages as well) = more VCCIN often needed.

My higher leakage part also seem to favor more VCCIN than my low leakage part did, even with less vcore.
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post #549 of 1438
Quote:
Originally Posted by moorhen2 View Post

That's a very broad statement, surely it depends on what cache frequencies and voltages are being pumped through the silicon, if you need high voltages to run a high cache then yes you are asking for trouble, good samples can run high cache frequencies at relatively low volts, at the moment I am running my cache at 4.2ghz with 1.17v, running AIDA64 cache stress test for 4+ hours without problems, and xtu, realbench etc fully stable.

You said it: A good sample.

But what if you get a not so good sample and you still try to push it? Could you realistically expect to have a system that will last for 1.5-2 years? With the X99 platform, a lot of factors concerning safe voltage and clock seems uncertain. Like Blameless mentioned, if you intend to have a 100% stable OC (which imply it can "survive" hours of Prime95/LinX AVX2+FMA3 stressing) then forget about pushing past 20% overclock unless you won the silicon lottery!

Correct me if I am wrong but usually, for a 24/7 OC, one go as far as possible on the voltage within recognized safe boundaries and then see what stable clock you get with said voltage... Because, let's face it, technology evolve rather quickly, so even if you cut your processor life expectancy by four, by the time a new generation arrive, your current CPU will certainly still be functional. For me, that's the point of "everyday usage" overclocking: push the current generation to the limit until the next upgrade. If you can't make it to the next gen, well, maybe that is where you are in trouble!
Edited by Galenmacil - 9/28/15 at 3:22pm
post #550 of 1438
Quote:
Originally Posted by Galenmacil View Post

You said it: A good sample.

But what if you get a not so good sample and you still try to push it? Could you realistically expect to have a system that will last for 1.5-2 years? With the X99 platform, a lot of factors concerning safe voltage and clock seems uncertain. Like Blameless mentioned, if you intend to have a 100% stable OC (which imply it can "survive" hours of Prime95/LinX AVX2+FMA3 stressing) then forget about pushing past 20% overclock unless you won the silicon lottery!

Correct me if I am wrong but usually, for a 24/7 OC, one go as far as possible on the voltage within recognized safe boundaries and then see what stable clock you get with said voltage... Because, let's face it, technology evolve rather quickly, so even if you cut your processor life expectancy by four, by the time a new generation arrive, your current CPU will certainly still be functional. For me, that's the point of "everyday usage" overclocking: push the current generation to the limit until the next upgrade. If you can't make it to the next gen, well, maybe that is where you are in trouble!

Like I stated before, you overclock at your own risk, and running hours of P95/Linx etc, wont do the chip any good anyway, why are people so obsessed with HAMMERING these cpu's with excessive stress tests, it's beyond me.
Edited by moorhen2 - 9/29/15 at 8:30am
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