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[arstechnica] AMD confirms 4GB limit for first HBM graphics card - Page 5  

post #41 of 50
Quote:
Originally Posted by Liranan View Post

Assuming AMD need to recover the costs of R&D at least I don't think these cards will be cheap.

Price/performance does not mean they have to be cheap, they just have to perform for their price point relative to other available (or pending) cards.

Multi-monitor and 4k+ resolutions, which would benefit most from HBM will be a tough sale if this is close in price/performance to the titan x due to the limited amount of VRAM.

At 1080p (and likely 1440p) this card will mainly be compared against the 970 and 290(x) rebrands if the performance isn't 150%+ of those cards there is no way they will be selling them at over 2 x the cost.

On top of that there will be the 290(x) rebrands that will have 8 gigs of vram and could also be a better choice for high resolutions, which by nature puts this card in a tough spot.

This card will need to perform for its price whether it is cheap or not, otherwise all it really is doing is bringing HBM to a market that doesn't need it in a 4 gig iteration.
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post #42 of 50
Quote:
Originally Posted by Liranan View Post

However looking at page 1 of the PDF it says that each channel can be up to 32Gbit, with a maximum of 8 channels/stacks. That leads to 32GB of VRAM, not 4GB. While that doesn't change the bus width of 4096 it does mean that Gen 1 isn't limited to 4GB of VRAM.

Correct. I never said that GEN1 was limited to 4GB of memory POSSIBLE, just that the bus is limited to 4096-bits.

I have said several times on this and other threads that yes, it is possible for AMD to design more than 4GB using GEN1, and most likely will, odds are that the INITIAL VERSIONS they kick out will be limited to 4 stacks (1GB per stack) of 4 chips each for a maximum of 4GB. Later on, they may come up with 8 stacks of 4 chips to get to 8GB, but they will have to figure out a way to do that while still dealing with the bus limitation.

It is not insurmountable, but odds are, it is not something they want to address right out of the gate.
post #43 of 50
Quote:
Originally Posted by ladcrooks View Post

drum.gif : band.gif Sorry about the noise tongue.gif

are you asleep yet biggrin.gifthumb.gif

No wonder I woke up, it's all your fault gunner.gif

Bloody insomnia again mad.gif
Quote:
Originally Posted by 47 Knucklehead View Post

Correct. I never said that GEN1 was limited to 4GB of memory POSSIBLE, just that the bus is limited to 4096-bits.

I have said several times on this and other threads that yes, it is possible for AMD to design more than 4GB using GEN1, and most likely will, odds are that the INITIAL VERSIONS they kick out will be limited to 4 stacks (1GB per stack) of 4 chips each for a maximum of 4GB. Later on, they may come up with 8 stacks of 4 chips to get to 8GB, but they will have to figure out a way to do that while still dealing with the bus limitation.

It is not insurmountable, but odds are, it is not something they want to address right out of the gate.

That could very well be possible but I hope not, while 4K gaming isn't that relevant yet it will become the standard soon and 4GB just isn't enough.
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post #44 of 50
So..the Dual Link Interposer w/ 8GB doesnt exist? AMD just made that up?
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post #45 of 50
No way in hell AMD would deliver a 4GB card when it's aiming at 4K gaming. That would be suicide.
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post #46 of 50
Glad to hear it. I don't feel like I should pay for extra memory when it's not needed. smile.gif
post #47 of 50
Quote:
Originally Posted by SkateZilla View Post

So..the Dual Link Interposer w/ 8GB doesnt exist? AMD just made that up?

Good catch there biggrin.gif
That indeed makes it possible.
post #48 of 50
Quote:
Originally Posted by SkateZilla View Post

So..the Dual Link Interposer w/ 8GB doesnt exist? AMD just made that up?

Rumour is this was requested by AIB and it was implemented, whether it will be in the first set of cards we will see soon enough.
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post #49 of 50
Quote:
Originally Posted by Liranan View Post

Rumour is this was requested by AIB and it was implemented, whether it will be in the first set of cards we will see soon enough.

Quote:
Originally Posted by The Stilt View Post

Good catch there biggrin.gif
That indeed makes it possible.


Integrating a dual link doesnt give AIB Partners the ability to change the RAM amount as the HBM is mounted to the interposer which is mounted to the GPU.substrate.package, so basically the ram is part of the gpu that AMD furnishes, so AIBs cant simply make a new pcb with more runs for twice the chips.

If AIB partners want 8 GB it has to.come from AMD that way.
Edited by SkateZilla - 5/21/15 at 3:26pm
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post #50 of 50
Repost, please keep discussing this matter in the following thread:

http://www.overclock.net/t/1556356/various-amd-hbm-presentation-and-slides

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