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[EETimes] Samsung Ramps 10nm in 2016, FinFET Roadmap Aligns with TSMC's Plans - Page 3

post #21 of 28
Quote:
Originally Posted by Dupl3xxx View Post

As part of the technology developed for mobile applications, there is now multiple ways to make the wafer thinner once it's complete with pretty drawings. Am I right in assuming a thinner piece of silicone will have less problem with heat dissipation?

Not enough. frown.gif That reduces the penalty of each stack but we are nearing the limits for cooling one layer.
Quote:
Originally Posted by Dupl3xxx View Post

NAND is going vertical on a single chip. "Stronger" cells, cheaper cells and more cells. Stacking multiple chips on top of one another might not be needed in the near future, depending on how high the stacks can get.

I thought GDDR5 was operating at 5GHz -> 8GHz these days, with the memory-controllers running either half (nvidia) or quarter (AMD) of that speed..?
Good point on NAND, the stacks can all exist on a single wafer and heat-per-cell is low enough cooling is still not an issue.

I think you are right about GDDR5 which makes my point stronger. smile.gif
Quote:
Originally Posted by Dupl3xxx View Post

Perhaps not stacked CPUs, but what about multiple chips on an interposer? Imagine each "CU" or "SMM" being it's own chip, or maybe 4 of each on a chip. This has been AMDs dream for GPUs for a long time. And considering they had working "stacked memory" prototypes working in 2011, with it being ready to launched in 2012, AMD most certainly has the packaging know-how to do it. And, assuming the cost of an interposer wouldn't be prohibitively high, four 150mm^2 chips are cheaper than a single 600m^2 chip, will yield better and so on. Further more, as the diffrent nodes get more and more expensive, doing tricks like this become more and more viable.

I do see the point as we move to nodes with significantly lower yields and I agree this might be an interesting development soon. However, using an interposer isn't stacking chips, it avoids the cooling issue and requires more area = min device size.
Quote:
Originally Posted by Dupl3xxx View Post

Are you sure about that? Fastest SB-based part I could find was the 2700K at 3.5GHz base, 3.9GHz turbo and the 3970X at 3.5GHz/4.0GHz. The Haswell based 4790K runs at 4.0GHz/4.4GHz. While it's not a huge leap in terms of frequency, the IPC has also improved and power usage has gone down. Would I like more? Yes. Has there been an increase in clock speed? Yes. And for all three those who care about Intel's integrated graphics, that has improved a lot!

Well Sandy Bridge could hit 5 Ghz easier than anything since, so based on the actual limits of the process Intel's 32nm allowed faster clock speeds than anything since. Architectural changes may have had an impact as well, I have no way of knowing, but it is looking like smaller, lower power, and slower is the trend as we shrink further.

Of course I don't mean the newer chips are actually slower, Intel boosts the IPC by using more transistors and there is plenty of room above shipping clock speeds in the previous nodes that they can keep stock clock speeds the same or even increase them slightly. But nothing on silicone looks likely to give us >5 Ghz max clocks purely due to power per area dissipation limits. frown.gif
Quote:
Originally Posted by L36 View Post

Quote:
Originally Posted by 47 Knucklehead View Post

Pascal will be 14nm. biggrin.gif
There is no concrete information that it will be 14nm. So thats unknown.

It would be more correct to say Pascal will be <28 nm. wink.gif
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post #22 of 28
Quote:
Originally Posted by Dupl3xxx View Post

Maybe. At this time, the best rumours say Pascal is 14nm/16nm. That means either one of TSMC/Samsung/GlFo/Intel could make it, with TSMC being the most likely option. And TSMC means 16nm, not 14nm wink.gif

And TSMC has yet to get 16nm into full production,while Samsung/GF has 14nm already going.
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post #23 of 28
I wonder what shall happen when we get to the point that silicon becomes pointless to make smaller.
post #24 of 28
Quote:
Originally Posted by Zyro71 View Post

I wonder what shall happen when we get to the point that silicon becomes pointless to make smaller.
That's a very interesting thing to wonder about. If you find any answers, besides stacking, tell TSMC, Intel, GlFo and Samsung, and you might not have to work another day in your life. Just remember the old advice, 1$ per unit > $1 000 000 cash.
Quote:
Originally Posted by Redwoodz View Post

And TSMC has yet to get 16nm into full production,while Samsung/GF has 14nm already going.

Samsung, yes. GlFo, I'm not sure. Either way, TSMC is behind at this time AFAIK. However, even though Samsung (and if not now, very soon) GlFo might be making 14nm chips now doesn't mean 14nm GPUs are coming anytime soon*, as mobile needs a lot more wafers compared to GPUs, and as long as there is high demand for wafers with comparatively few of them "for sale", GPUs don't get priority. Mobile is simply willing/able to pay more per wafer. And Samsung owns part of that node, with their own fabs, meaning if they want more mobile chips, they don't care what you offer them, they own the fab.

*soon in this context meaning anything beyond a PR paper stunt this year with less than 10K units worldwide. Se GTX 480 for example.
Quote:
Originally Posted by Asmodian View Post

Of course I don't mean the newer chips are actually slower, Intel boosts the IPC by using more transistors and there is plenty of room above shipping clock speeds in the previous nodes that they can keep stock clock speeds the same or even increase them slightly. But nothing on silicone looks likely to give us >5 Ghz max clocks purely due to power per area dissipation limits.

Intel doesn't aim for slower, they simply put all advancements in performance towards lower power consumption. If you can increase IPC by 10% overall, you can decrease the clock by 10% and have the same performance at lower power. This is very clear if you look at models like the i7 5950U. Dual-core at 2.2GHz base with turbo upto 3.1GHz and a TDP limited to 15 -> 9.5 Watt. And those 15 -> 9.5 watts are shared with the integrated "GPU". That's some serious performance for almost no power. Would it be nice if Intel used this so give us 7GHz monsters? Yes. Is it possible? Nope. The node Intel uses for these kind of chips are engineered for low power at near any cost. I would bet that these dual-cores with proper water-cooling wouldn't even hit 5GHz. They are not optimized for speed at all. But with the desktop-oriented CPUs, speed is a lot more important, and as such, is very likely to use a different version of that node.
post #25 of 28
well if we throw away the iGPU & the overkill quad channel DDR3/4 + 40 PCIE lanes, Intel would have able to easily put up a 4GHz hex core that still clock well within <100w tdp.

the reason those 2011 CPU have high power usage is because the quad channels & a larger cache size as well as those extra PCIE lanes.
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post #26 of 28
Quote:
Originally Posted by Redwoodz View Post

And TSMC has yet to get 16nm into full production,while Samsung/GF has 14nm already going.
Yes, but Samsung is only doing low power SOCs. There is no way they can produce 14nm high performance transistors without serious yield issues.
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post #27 of 28
Quote:
Originally Posted by Dupl3xxx View Post

That's a very interesting thing to wonder about. If you find any answers, besides stacking, tell TSMC, Intel, GlFo and Samsung, and you might not have to work another day in your life. Just remember the old advice, 1$ per unit > $1 000 000 cash.
Samsung, yes. GlFo, I'm not sure. Either way, TSMC is behind at this time AFAIK. However, even though Samsung (and if not now, very soon) GlFo might be making 14nm chips now doesn't mean 14nm GPUs are coming anytime soon*, as mobile needs a lot more wafers compared to GPUs, and as long as there is high demand for wafers with comparatively few of them "for sale", GPUs don't get priority. Mobile is simply willing/able to pay more per wafer. And Samsung owns part of that node, with their own fabs, meaning if they want more mobile chips, they don't care what you offer them, they own the fab.

*soon in this context meaning anything beyond a PR paper stunt this year with less than 10K units worldwide. Se GTX 480 for example.
Intel doesn't aim for slower, they simply put all advancements in performance towards lower power consumption. If you can increase IPC by 10% overall, you can decrease the clock by 10% and have the same performance at lower power. This is very clear if you look at models like the i7 5950U. Dual-core at 2.2GHz base with turbo upto 3.1GHz and a TDP limited to 15 -> 9.5 Watt. And those 15 -> 9.5 watts are shared with the integrated "GPU". That's some serious performance for almost no power. Would it be nice if Intel used this so give us 7GHz monsters? Yes. Is it possible? Nope. The node Intel uses for these kind of chips are engineered for low power at near any cost. I would bet that these dual-cores with proper water-cooling wouldn't even hit 5GHz. They are not optimized for speed at all. But with the desktop-oriented CPUs, speed is a lot more important, and as such, is very likely to use a different version of that node.

Quote:
Originally Posted by L36 View Post

Yes, but Samsung is only doing low power SOCs. There is no way they can produce 14nm high performance transistors without serious yield issues.


GF is in full production of 14nm FinFet LP (low power) as we speak,with the first orders going to mobile.The 14nmFinFet LPP (low power plus), which the next AMD GPU's will be made on,should start pre-production Q3 2015 with full production Q1 2016.
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post #28 of 28
Thread Starter 
They might be able to find ways to stack multiple low power chip together for GPU. Then then heat dissipation may be ok. Keep in mind that with V-NAND Samsung was able to claim 20% lower power consumption even when going back to a bigger node, so if the future stacked GPUs are made on a smaller node, the power consumption per unit of measure (TFLOP?) should go down. going.
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