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Hawaii Bios Editing ( 290 / 290X / 295X2 / 390 / 390X ) - Page 151

post #1501 of 3620
Quote:
Originally Posted by gupsterg View Post

Quote:
Originally Posted by kizwan View Post

How about map for powerplay?

This image is before knowing about directory tree in powerplay, not had time to update.
Warning: Spoiler! (Click to show)

Ref the info in the VDDCI ROM for directory tree, etc and apply to your ROM in conjunction with above.
Thank you!
Quote:
Originally Posted by gupsterg View Post

Quote:
Originally Posted by kizwan View Post

I can run infinite loop of Heaven or hours of GTA V @1150/1500. My card only crashed when lightly loaded, e.g. internet browsing, reading, watching video, etc.

Do you have MEMCLK 2 lower freq. than highest one? and DPM 1 & 2 matched to MEMCLK 2?
Warning: Spoiler! (Click to show)

Like I said in stock ROM if I apply ~1620+ blackscreen at desktop instantly, due to that mod at desktop use I won't see RAM go to 1525MHz; unless a high enough load is created = VDDC will be high = no blackscreen for me.

Also match GPU 2 to GPU Freq. DPM 2.

Berkeley post may help.
No for both questions. The order of the GPUCLK & MEMCLK are not always the same for all ROMs though. For fun I did re-arranged the GPUCLK & MEMCLK to the same order in your screenshot. The result was boot clock will be 1000/1300 & both 2D/3D clock will stuck at 300/150 always. On the other hand, I think this may be a good trick to prevent the memory from boosting to max clock when running multiple monitor.

I also don't think GPU 2 should have same value as GPU Freq. DPM 2 because my stock referenced ROM doesn't follow this rule though. Sorry I checked back the stock referenced ROM & this is true but stock ROM only have one high memory clock.

This is screenshot of my modded ROM based on.

Edited by kizwan - 1/30/16 at 4:52pm
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post #1502 of 3620
Thread Starter 
May have an answer regarding why 390 ROM = lower VID for EVV.

Check out table named ASIC_ProfilingInfo/ASIC_VDDCI_Info wink.gif .
Quote:
The order of the GPUCLK & MEMCLK are not always the same for all ROMs

Indeed smile.gif
Code:
03 09 58 92 01 94 05 02 02 10 00 FC 1B 01 48 E8 01 20 10 00 30 75 00 98 3A 00 00 01 00

Above is my factory ROMS ClockInfo section from PowerPlay. After each state the 3 trailing bytes denote state order AFAIK. Hawaiireader I don't think reads those.

03 = No. of states , identifiers 02 10 00 , 20 10 00 , 00 01 00 .
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post #1503 of 3620
Quote:
Originally Posted by gupsterg View Post

May have an answer regarding why 390 ROM = lower VID for EVV.

Check out table named ASIC_ProfilingInfo/ASIC_VDDCI_Info wink.gif .
Quote:
The order of the GPUCLK & MEMCLK are not always the same for all ROMs

Indeed smile.gif
Code:
03 09 58 92 01 94 05 02 02 10 00 FC 1B 01 48 E8 01 20 10 00 30 75 00 98 3A 00 00 01 00

Above is my factory ROMS ClockInfo section from PowerPlay. After each state the 3 trailing bytes denote state order AFAIK. Hawaiireader I don't think reads those.

03 = No. of states , identifiers 02 10 00 , 20 10 00 , 00 01 00 .
Code:
03           = No. of states
09              = ??
58 92 01        = 1030MHz core clock
94 05 02        = 1325MHz memory clock
02 10 00        = identifier
FC 1B 01        = 727MHz core clock
48 E8 01        = 1250MHz memory clock
20 10 00        = identifier
30 75 00        = 300MHz core clock
98 3A 00        = 150MHz memory clock
00 01 00        = identifier

Correct? The identifiers determined which boot, idle & 3d clocks?
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post #1504 of 3620
Thread Starter 
Quote:
Originally Posted by kizwan View Post

Code:
03           = No. of states
09              = ??
58 92 01        = 1030MHz core clock
94 05 02        = 1325MHz memory clock
02 10 00        = identifier
FC 1B 01        = 727MHz core clock
48 E8 01        = 1250MHz memory clock
20 10 00        = identifier
30 75 00        = 300MHz core clock
98 3A 00        = 150MHz memory clock
00 01 00        = identifier

Correct?

Yes.
Quote:
Originally Posted by kizwan View Post

The identifiers determined which boot, idle & 3d clocks?

AFAIK, The Stilt posted about the identifiers several pages back (around when he stated VDDCI state mod/ I question why MLU have 4 states ClockInfo).
Edited by gupsterg - 1/30/16 at 5:27pm
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post #1505 of 3620
i dont think that you can achieve something by adding third state but thats just my opinion (except instability biggrin.gif)
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post #1506 of 3620
Quote:
Originally Posted by gupsterg View Post

Quote:
Originally Posted by kizwan View Post

The identifiers determined which boot, idle & 3d clocks?

AFAIK, The Stilt posted about the identifiers several pages back (around when he stated VDDCI state mod/ I question why MLU have 4 states ClockInfo).
My modded ROM have 4 states too.
Code:
04 09 0C 11 01 48 E8 01 02 10 00 30 75 00 98 3A 00 00 01 00 A0 86 01 D0 FB 01 02 10 00 38 2B 01 F0 49 02 20 10 00

04              = No. of states
09              = ??
0C 11 01        = 699MHz core clock
48 E8 01        = 1250MHz memory clock
02 10 00        = identifier
30 75 00        = 300MHz core clock
98 3A 00        = 150MHz memory clock
00 01 00        = identifier
A0 86 01        = 1000MHz core clock
D0 FB 01        = 1300MHz memory clock
02 10 00        = identifier
38 2B 01        = 766MHz core clock
F0 49 02        = 1500MHz memory clock
20 10 00        = identifier

Boot & 3d clocks have identical identifier. What is the 4th state for? 766 & 1500 are not listed in any DPM states when I checked the stock XFX390DD ROM which my modded ROM based on.
Edited by kizwan - 1/30/16 at 5:39pm
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post #1507 of 3620
Thread Starter 
I have no idea on 4th state purpose. IIRC Stilt said it had no purpose.

Perhaps it's new revision of powerplay thing. MLU is latest 290/X ROM. For example the fan table revision in powerplay is 07.

The latest Sapphire Vapor-X ROM (don't use as temp logo on card go weird) I have from Sapphire Support uses 07 fan table plus PowerPlay is bigger than older ROMs. Some of the empty bits on that ROM allow enabling(ie pointers) to new sections within PowerPlay if being used (again Stilt posted few pages back).
Edited by gupsterg - 1/30/16 at 5:51pm
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post #1508 of 3620
some progress on vrm switching frequency? it is probably just 1 byte as there is no place with 6(5) same values

there is interesting datasheet for ir3565 http://www.irf.com/technical-info/appnotes/an-1208.pdf
there are some parts which can be same for our ir3567b
Edited by OneB1t - 1/30/16 at 8:07pm
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post #1509 of 3620
Thread Starter 
I can see MSI 290X Lightning have uP6266.

LightningInfo.zip 2746k .zip file

I don't redface.gif .

V6V32MEM.zip 111k .zip file

q1) I've been also viewing MSI 290X Lightning PCB images and yet to identify it, I can't even find an image of UP6266 on web, you found one?

q2) I'm guessing your cards i2cdump have it as the info you posted earlier in thread is from your card? if so what card do you have?

q3) what do you think function is of uP6266? I'm thinking can't be MVDDC because PT1/PT3 as Shammy only highlight in post:-
Quote:
ok, dont need to do Vcore/VDDCI ocp mods, just flash this bios
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post #1510 of 3620
"uP6266" is present on all Hawaii cards, regardless if they have adjustable MVDDC or not. It is a tiny sink / source DAC in SOT23-8 package. It is located next to the through-hole inductor in the front of the card (close to the fan header). PCB location U502B. http://www.techpowerup.com/reviews/AMD/R9_290X/images/front_full.jpg
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