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*Official* Intel DDR4 24/7 Memory Stability Thread - Page 243

post #2421 of 5786
Quote:
Originally Posted by Jpmboy View Post

the gskill 8x8GB 3200c14 kit runs 3400c13@1.45V - no problem on the R5E-10 with this 6950X. (tho, I cannot get 1T to post at all, but 2T does not affect bandwidth)
This was run while browsing @1440P/120 on a swift while live streaming the olympics at 4K to another monitor. biggrin.gif 4.3/3.7.

Interesting. You tried running 3466C16 @1.35V or less? I know you're a smoke em if you got em guy, but curious how the 3200C14 bin compares to 3466C16
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post #2422 of 5786
Hey guys could use some advice. Ive been playing around with clocking the Gskill 3600 CL15 kit. I wanted to start off at stock speeds and basically just tighten up the timings. This is what I came up with. Im sure there are many things that can be improved but when running at 1t the memory seems very touchy. Lots of 41/55 codes. Currently I am running the timings below with 1.4V Dram 1.224V VCCIO and 1.25V SA. ANyone else have this ram and care to share what timings they achieved? Any advice on how to get more out of the sticks is welcome! thumb.gif

post #2423 of 5786
Quote:
Originally Posted by cookiesowns View Post

Interesting. You tried running 3466C16 @1.35V or less? I know you're a smoke em if you got em guy, but curious how the 3200C14 bin compares to 3466C16
3466c15 only. 1.4V was needed. 3466c14 is 1.45 on my 64GB kit (both 2T). But, 3466 was not as "productive" as 3400. May be a memory divider thing - IDK.
Quote:
Originally Posted by superkyle1721 View Post

Hey guys could use some advice. Ive been playing around with clocking the Gskill 3600 CL15 kit. I wanted to start off at stock speeds and basically just tighten up the timings. This is what I came up with. Im sure there are many things that can be improved but when running at 1t the memory seems very touchy. Lots of 41/55 codes. Currently I am running the timings below with 1.4V Dram 1.224V VCCIO and 1.25V SA. ANyone else have this ram and care to share what timings they achieved? Any advice on how to get more out of the sticks is welcome! thumb.gif
Warning: Spoiler! (Click to show)
On ASUS t-top boards, at 3600 and higher, set these secondary timings to the same value as CAS: TRDWR_sg TRDWR_dg and TRDWR_dr + TRDWR_dd

http://forum.hwbot.org/showthread.php?t=148427
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post #2424 of 5786
Quote:
Originally Posted by Jpmboy View Post

3466c15 only. 1.4V was needed. 3466c14 is 1.45 on my 64GB kit (both 2T). But, 3466 was not as "productive" as 3400. May be a memory divider thing - IDK.
On ASUS t-top boards, at 3600 and higher, set these secondary timings to the same value as CAS: TRDWR_sg TRDWR_dg and TRDWR_dr + TRDWR_dd

http://forum.hwbot.org/showthread.php?t=148427
Thanks jpmboy. I know to match the timings with CL above 3600 but directly at 3600 I didn't have any issues with setting the timings below CL. The timings that gave me the most issues were tCWL. Trying a setting below 13 resulted in code 41 every time no matter what I tried it seems. The settings I posted earlier are memtest stable but not nearly as tight as I would like. Once I get 3600 as tight as possible I'll save and move on to the next speed step and so on. With each sequential speed I tighten up I plan to run a series on benchmarks to quantify which is the best (i.e. Speed vs latency at higher clocks) I don't plan on pushing more than say 1.5V dram 24/7 so the clocks closer to 4K will be merely for show and fun. Still a lot to learn as far as timings go and how they interact but I enjoy it!!
post #2425 of 5786
Quote:
Originally Posted by superkyle1721 View Post

Thanks jpmboy. I know to match the timings with CL above 3600 but directly at 3600 I didn't have any issues with setting the timings below CL. The timings that gave me the most issues were tCWL. Trying a setting below 13 resulted in code 41 every time no matter what I tried it seems. The settings I posted earlier are memtest stable but not nearly as tight as I would like. Once I get 3600 as tight as possible I'll save and move on to the next speed step and so on. With each sequential speed I tighten up I plan to run a series on benchmarks to quantify which is the best (i.e. Speed vs latency at higher clocks) I don't plan on pushing more than say 1.5V dram 24/7 so the clocks closer to 4K will be merely for show and fun. Still a lot to learn as far as timings go and how they interact but I enjoy it!!

write latency needs to be Cas -3 or less (like -1 or the same as CAS). Thats likely the 41 since they are used to set RTLs, AFAIK. You set the RTL offset to 21?
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post #2426 of 5786
Quote:
Originally Posted by Jpmboy View Post

write latency needs to be Cas -3 or less (like -1 or the same as CAS). Thats likely the 41 since they are used to set RTLs, AFAIK. You set the RTL offset to 21?

You are prob right. The only reason I worked on trying to get it lower was bc in the other memory forum when I was first learning I was told to first boot with a tCWL of 9. When I first posted my timing for my old ram they said the value of 13 was too high. I don't think this ram will take 9 bc I tried everything. Everything on auto manually entered xmp timings and tCWL and no matter the voltage I would get no boot. RTL defaults to 21 for me since I'm only using 2 sticks.
post #2427 of 5786
Quote:
Originally Posted by superkyle1721 View Post

You are prob right. The only reason I worked on trying to get it lower was bc in the other memory forum when I was first learning I was told to first boot with a tCWL of 9. When I first posted my timing for my old ram they said the value of 13 was too high. I don't think this ram will take 9 bc I tried everything. Everything on auto manually entered xmp timings and tCWL and no matter the voltage I would get no boot. RTL defaults to 21 for me since I'm only using 2 sticks.

yeah, some kits have their limits. to get tCWL to boot at 9, what voltage did you run it up to? remember, the advice you may be getting (especially off the BOT) may refer to a very different voltage universe. wink.gif
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post #2428 of 5786
Thread Starter 
My kit has no issue with write latency at 9, to my surprise. That's at both 3200 and 3400.
post #2429 of 5786
Quote:
Originally Posted by Silent Scone View Post

My kit has no issue with write latency at 9, to my surprise. That's at both 3200 and 3400.

Yeah - this 64GB kit runs tCWL @ 9 and without establishing stability - so the comparison may not be valid - it's not buying anything for me (yeah, I know.. 2T redface.gif )

tWCL 12 (Auto):


tCWL 9
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post #2430 of 5786
A little more tweaking that passed 80 minutes of GSAT no spiiking:

djgar--i6900K @4.604/3.836---3410Mhz-C14-15-14-17-1T----1.39v---SA 1.20v---Stressapptest----80 Mins
Strix X99


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