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*Official* Intel DDR4 24/7 Memory Stability Thread - Page 58

post #571 of 4614
Yeah same kit as shown it's the 3866. Never touched these values before reading that hwbot thread, all auto values.

Then found that screenshot showing I already had them at 12 for this 3866. And now as earlier mentioned, they're at 34 for some reason.
Edited by error-id10t - 1/30/16 at 2:47pm
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post #572 of 4614
Quote:
Originally Posted by Silent Scone View Post

Hence initial part tongue.gif
thumb.gif

just trying to post some helpful "tid-bits" from among tweaks really only useful at >1.6V ohno-smiley.gif
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post #573 of 4614
Quote:
Originally Posted by Jpmboy View Post

thumb.gif

just trying to post some helpful "tid-bits" from among tweaks really only useful at >1.6V ohno-smiley.gif

I have a 3733 Trident Z kit that worked fine on my 6700k, but it wouldn't work quite right on my 6600k. The one bit you posted about the 4 dimm issue seems to have solved the problem. I hadn't read that guide before as I mostly lurk here.

Glad you posted it.
post #574 of 4614
Quote:
Originally Posted by Digitalwolf View Post

I have a 3733 Trident Z kit that worked fine on my 6700k, but it wouldn't work quite right on my 6600k. The one bit you posted about the 4 dimm issue seems to have solved the problem. I hadn't read that guide before as I mostly lurk here.

Glad you posted it.
Thanks. good to know it helped. thumb.gif
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post #575 of 4614
This kit is driving me nuts. Last night like I posted it was showing 34 and couldn't get it back to 12 which was implied on that screenshot from a week ago. Posted here and went to play with the kid and wife and then sleep. Now I'm back.. and guess what, it's freaking 12! I swear this system is haunted and I have no control anymore
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post #576 of 4614
Thread Starter 
Quote:
Originally Posted by error-id10t View Post

This kit is driving me nuts. Last night like I posted it was showing 34 and couldn't get it back to 12 which was implied on that screenshot from a week ago. Posted here and went to play with the kid and wife and then sleep. Now I'm back.. and guess what, it's freaking 12! I swear this system is haunted and I have no control anymore

This is normal, if the values aren't entered manually, during training they can change from POST to POST.
post #577 of 4614
Quote:
Originally Posted by Silent Scone View Post

This is normal, if the values aren't entered manually, during training they can change from POST to POST.

Can anyone shed any light on what happens with memory training?

Does it reset itself after a BIOS flash? Or even a reset to defaults?

Does it just change one or maybe a couple of related timings at a time?

About how many restarts would you think it would take before it settles close to or on final settings?
post #578 of 4614
Thread Starter 
Quote:
Originally Posted by Deders View Post

Can anyone shed any light on what happens with memory training?

Does it reset itself after a BIOS flash? Or even a reset to defaults?

Does it just change one or maybe a couple of related timings at a time?

About how many restarts would you think it would take before it settles close to or on final settings?


The memory controller performs training at each POST. This process is more difficult to pass than OS stability tests because the result is either a Pass/Fail based on the signal adjustment and what is considered valid within that predefined window. Sometimes it pays to play dumb from a user standpoint and accept that when the relevant Q-CODEs are flagged, the memory is most probably not stable and the signals are intruding on one another. The settings you speak of do not settle and are predetermined based on the conditions that validate them during the process. (temp, imdepdance drift, voltages)

Disabling these procedures with settings like MRC Fastboot, the system will retrain the memory one last time on applying this setting - from then on the system will load these determined on what is then stored in NVRAM. A scarily common misconception is that this solves memory training issues, when in fact if the memory isn't stable the system may need to retrain again before more passable settings are stored.

Bottom line these things need to happen, and it pays to pay attention to what is happening at POST. To interpret the training and enhanced training procedures to a level that could be considered even close to comprehensible requires a bigger cranium than mine, but you need only really take note of what helps you determine what will retain consistent passing during training. Which for the most part, is back off or apply more voltage. Simples. (Meerkat Cat)
Edited by Silent Scone - 1/31/16 at 2:51am
post #579 of 4614
Much appreciated. I might start noting down what changes are made.

When you say the settings are stored, does updating or resetting the BIOS, or even enabling/disabling XMP reset it to default values?
post #580 of 4614
Thread Starter 
Quote:
Originally Posted by Deders View Post

Much appreciated. I might start noting down what changes are made.

When you say the settings are stored, does updating or resetting the BIOS, or even enabling/disabling XMP reset it to default values?


Yes clearing or updating the UEFI should clear whatever is stored in NVRAM. I'll see if you can ponder over the repercussions of toggling profiles from one POST to the next with MRC FastBoot disabled.
Edited by Silent Scone - 1/31/16 at 2:25am
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