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[Various] Ashes of the Singularity DX12 Benchmarks - Page 218  

post #2171 of 2682
Quote:
Originally Posted by Anna Torrent View Post

I don't understand - is it software only? There is nothing in the NV GPU hardware that could carry out such functionality? at all?
It's hard to follow all these posts.

The Asynchronous Warp Schedulers are in the hardware. Each SMM (which is a shader engine in GCN terms) holds four AWSs. Unlike GCN, the scheduling aspect is handled in software for Maxwell 2. In the driver there's a Grid Management Queue which holds pending tasks and assigns the pending tasks to another piece of software which is the work distributor. The work distributor then assigns the tasks to available Asynchronous Warp Schedulers. It's quite a few different "parts" working together. A software and a hardware component if you will.

With GCN the developer sends work to a particular queue (Graphic/Compute/Copy) and the driver just sends it to the Asynchronous Compute Engine (for Async compute) or Graphic Command Processor (Graphic tasks but can also handle compute), DMA Engines (Copy). The queues, for pending Async work, are held within the ACEs (8 deep each)... and ACEs handle assigning Async tasks to available compute units.

Simplified...

Maxwell 2: Queues in Software, work distributor in software (context switching), Asynchronous Warps in hardware, DMA Engines in hardware, CUDA cores in hardware.
GCN: Queues/Work distributor/Asynchronous Compute engines (ACEs/Graphic Command Processor) in hardware, Copy (DMA Engines) in hardware, CUs in hardware.
Edited by Mahigan - 9/4/15 at 3:49pm
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post #2172 of 2682
Quote:
Originally Posted by Devnant View Post

Cool! thumb.gif

But thanks anyway Mahigan! biggrin.gif
So us folks with 12 and 16 threads shouldn't worry AT ALL right?
I am still on a 45nm Phenom II. I don't think i will see in the near future an AMD octacore, let alone something that costs 1000$.
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post #2173 of 2682
Quote:
Originally Posted by Devnant View Post

So us folks with 12 and 16 threads shouldn't worry AT ALL right?

Nope. I don't see it being a problem with a huge CPU like that. I also don't see many people pairing an i3 with a GTX 980 Ti either tongue.gif
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post #2174 of 2682
After reading through this thread I have learned a great deal about how DX12 and Gpu's work. I own both brands and buy what gives me the best performance/cost ratio. I am sure team green will optimize their cards through the driver to limit the impact of AS on performance. What bothers me is all they had to do is say whether maxwell has hardware scheduler or is Cpu based. Instead there is silence which results in all the speculation we are seeing,
post #2175 of 2682
Quote:
Originally Posted by FastEddieNYC View Post

After reading through this thread I have learned a great deal about how DX12 and Gpu's work. I own both brands and buy what gives me the best performance/cost ratio. I am sure team green will optimize their cards through the driver to limit the impact of AS on performance. What bothers me is all they had to do is say whether maxwell has hardware scheduler or is Cpu based. Instead there is silence which results in all the speculation we are seeing,

That's been bothering me from Day 1. We still only heard it from Oxide. Kollock is a great guy thumb.gif A developer who seems to care about the PC Gaming community. So rare to see this these days. I think I'll be buying all of the games he works on from now on. I know who he is tongue.gif

I've literally got a smile from ear to ear biggrin.gif
Edited by Mahigan - 9/4/15 at 3:34pm
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post #2176 of 2682
Sweet merciful Jesus, I hope this gets sorted out ASAP so we can bring this mess to a close. At least we have some clarity from Oxide.
post #2177 of 2682
Quote:
Originally Posted by Mahigan View Post

The Asynchronous Warp Schedulers are in the hardware. Each SMM (which is a shader engine in GCN terms) holds four AWSs. Unlike GCN, the scheduling aspect is handled in software for Maxwell 2. In the driver there's a Grid Management Queue which holds pending tasks and assigns the pending tasks to another piece of software which is the work distributor. The work distributor then assigns the tasks to available Asynchronous Warp Schedulers. It's quite a few different "parts" working together. A software and a hardware component if you will.

With GCN the developer sends work to a particular queue (Graphic/Compute/Copy) and the driver just sends it to the Asynchronous Compute Engine or Graphic Command Processor, DMA Engines. The queues, for pending work, are held within the ACEs (8 deep each)... and ACEs handle assigning tasks to available compute units.

Simplified...

Maxwell 2: Queues in Software, work distributor in software (context switching), Asynchronous Warps in hardware, CUDA cores in hardware.
GCN: Queues/Work distributor/Asynchronous Compute engines (ACEs/Graphic Command Processor) in hardware, CUs in hardware.

I see, so:

1. M2 does have Async capabilities, if you can feed the SMMs correctly, but it has its costs, right? That's in contrast to not having this option at all (like the old VLIW)
2. We know what is the level of efficiency of the M2 machanism?
3. Are we sure there is no hardware like Queues and work distributor in HW and it's simply not activated? Do we know for sure the M2 doesn't have the HW itself?
What is the source? NV developer docs?
4. Why won't you sum it all up in some sticky? that's barely useful right now..
post #2178 of 2682
Quote:
Originally Posted by Anna Torrent View Post

I see, so:

1. M2 does have Async capabilities, if you can feed the SMMs correctly, but it has its costs, right? That's in contrast to not having this option at all (like the old VLIW)
2. We know what is the level of efficiency of the M2 machanism?
3. Are we sure there is no hardware like Queues and work distributor in HW and it's simply not activated? Do we know for sure the M2 doesn't have the HW itself?
What is the source? NV developer docs?
4. Why won't you sum it all up in some sticky? that's barely useful right now..

Here's the HyperQ documentation...
http://docs.nvidia.com/cuda/samples/6_Advanced/simpleHyperQ/doc/HyperQ.pdf

Here's HyperQ on Kepler (but don't forget that Maxwell 2 will add 1 Graphic task into this mix): Warning: Spoiler! (Click to show)


More info here: http://electronicdesign.com/digital-ics/gpu-architecture-improves-embedded-application-support
Hyper-Q allows multiple CPUs to drive a GPU job queue there by reducing GPU idle time.
Quote:
Hyper-Q is needed because the CPU/GPU combination these days is really a multicore CPU/multicore GPU combination. The CPU can be running multiple tasks that will initiate jobs on the GPU and the GPU is running a large number of relatively or totally independent jobs. Hyper-Q simplifies the programmers job because it eliminates the bottle neck feeding jobs to the GPU.
Warning: Spoiler! (Click to show)
Created with GIMP
The Blue squares are the CPU Cores, the Black squares are the Multiple tasks held in the Work Distributor and then the Green part is the SMMs on the GPU side (which contain the Asynchronous Warp Schedulers)

Edited by Mahigan - 9/4/15 at 4:05pm
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post #2179 of 2682

Nvidia VR preemption "possibly catastrophic"

 

https://www.youtube.com/watch?v=tTVeZlwn9W8&feature=youtu.be&t=1h21m35s

 

David Kanter talks to Scott Wasson on the TR Podcast and confirms Nvidia's problems with Maxwell for VR.

 

He says that in terms of preemption they are "possibly catastrophic" and even behind pre-Skylake Intel.

 

Source : Forum Anandtech

post #2180 of 2682
I hope Nvidia isn't just using them to calm the waves. They haven't directly made any promises and have left oxide to communicate that there's hope.

If their driver hackery doesn't measure up who is to blame?
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