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[DigiTimes] AMD Zen architecture set for 4Q16 - Page 22

post #211 of 241
Quote:
Originally Posted by Ultracarpet View Post

Lol yep.

Honestly if there is one person to really blame, it's Jerry Sanders. Sure Intel may have cheated a bit back when AMD was top dog, but Jerry went out of freaking control with spending and the "Wozniak" of AMD peaced out because of it. They messed up HUGE when they were on top, and haven't really recovered since.

Cheated a bit? Understatement of the day.
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post #212 of 241
Quote:
Originally Posted by maarten12100 View Post

Oh yeah Carrizo showed how much Intel's current 14nm node is ahead of GFs 28nm node. Good power management makes a product that was designed for a tiny amount of money deliver the same or better efficiency as Intel's 14nm throw money at it product.

Great node which I had invested billions in something so worthwhile... Let's see what happens when they get their 2 node shrinks with finfets biggrin.gif
Intel get's 10nm by then probably if AMD is really serious about the future they should move over to electron lithography as soon as possible as in as soon as such a tech is ready and more importantly can produce volume. No more paying for a new mask because there are no masks redesign a chip more readily without huge cost for small adjustments and most importantly make even smaller transistors.

It's a win whoever brings it to fruition first. But Intel thanks for giving away so much money to ASML for litho machines.

I totally agree with you about the Take or Pay debacle though.

What AMD needs is a solid server / Enthusiast processor that cuts into Intel's 95% & 80% market share, anything less is worthless.

An 8 core / 16 thread processor with Haswell IPC, while avg OC's are 4.8... tell me that wouldn't put AMD back on the map. Especially if they price it properly below $500.

What I fear will happen is Sandy/Ivy IPC with below than 4.5 avg OC's
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post #213 of 241
Quote:
Originally Posted by Cyro999 View Post

And yet Intel's 14nm clocks probably better than their 22nm. Broadwell and Skylake also from the same 14nm fabs have pretty vastly different OC capability as well

Yeah, historically speaking, smaller processes allow higher clock speeds as the transistor switching speed is increased. The limiting factors related to the node shrinks are current and voltage carrying abilities and cooling constraints.

A smaller die is harder to cool, and smaller traces cannot carry as much current before acting as a fuse baaasmiley.gif

That said, AMD is making a HUGE change in processes. Much larger than I think most people realize. AMD FX-8350 is a 32nm SOI CPU. The next FX CPU will be on 14nm FinFet LPP.

That is to say that AMD is skipping, for FX, 28nm, 22nm, 20nm, and 16nm. AND adopting FinFet. AND using a new core design. All at once.

Also seems that most people don't seem to respect how much better Excavator is than Piledriver in every arena other than FPU (which is largely unchanged). The new FX-CPU should be about 50% faster per clock on average, with an uneven distribution of IPC gains, of course. I wholly expect much of that to come from the FPU - AMD's currently weakest spot.

And, of course, many people don't seem to appreciate that Intel's gains have been mostly targeted at SIMD and the FPU, so the difference between Intel and AMD has been exaggerated (still real, of course, but Zen will undoubtedly have full native support for the appropriate instructions, and is built knowing Intel's capabilities well in advance).
post #214 of 241
Quote:
And, of course, many people don't seem to appreciate that Intel's gains have been mostly targeted at SIMD and the FPU

Memory controller and cache is also a huge area for improvement, bulldozer always struggled a bit with both
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post #215 of 241
Quote:
Originally Posted by looncraz View Post

Yeah, historically speaking, smaller processes allow higher clock speeds as the transistor switching speed is increased. The limiting factors related to the node shrinks are current and voltage carrying abilities and cooling constraints.

A smaller die is harder to cool, and smaller traces cannot carry as much current before acting as a fuse baaasmiley.gif

That said, AMD is making a HUGE change in processes. Much larger than I think most people realize. AMD FX-8350 is a 32nm SOI CPU. The next FX CPU will be on 14nm FinFet LPP.

That is to say that AMD is skipping, for FX, 28nm, 22nm, 20nm, and 16nm. AND adopting FinFet. AND using a new core design. All at once.

Also seems that most people don't seem to respect how much better Excavator is than Piledriver in every arena other than FPU (which is largely unchanged). The new FX-CPU should be about 50% faster per clock on average, with an uneven distribution of IPC gains, of course. I wholly expect much of that to come from the FPU - AMD's currently weakest spot.

And, of course, many people don't seem to appreciate that Intel's gains have been mostly targeted at SIMD and the FPU, so the difference between Intel and AMD has been exaggerated (still real, of course, but Zen will undoubtedly have full native support for the appropriate instructions, and is built knowing Intel's capabilities well in advance).



This is what scares me the most. Can AMD truly provide insurance to their stock holders and boost consumer confidence by skipping so many architecture changes? They are moving from 32nm to 16nm which is huge in my book. Sure, they are in a partnership with someone who has refined this process but in my opinion, success is easier to attain when you gradually make this transition. INTEL did it step by step, took notes and fixed things with every change.

Intel also explained they have issues at 14nm and at 10nm eventhough they have their own fabs, unlimited resources, and experience from all the node processes AMD is skipping. INTEL is adding another 14nm , Kaby Lake, to iron out the process and buy time for thier think tank to solve the 10nm conundrums.

Will AMD hit the target with Zen or we will see excuses on OCN like everytime when they release a 'new product' :

1. New tech guys, needs to mature 5-10 years tongue.gif
2. Drivers aren't ready (who knows maybe Zen needs drivers tongue.gif)
3. Guys, AMD invented that approach, Intel would be nothing without them
4. My AMD scores well in benchmark 89786 but scores bad in the other 1093784665 benchmarks. For me benchmark 89786 is important so AMD is better than Intel.
5. AMD is cheaper, buy AMD, better bang for the buck
6. AMD does not use unethical practices, support the underdog


Apologies if I missed anything thumb.gif
 
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post #216 of 241
Quote:
Originally Posted by The Stilt View Post

lachen.gif at the "4GHz" speculations.

The manufacturing process is designed and optimized for <2.1GHz (LPE) and <2.4GHz (LPP) Fmax, which is usually the upper frequency range of low-power ARM SoCs and some specialized ASICs. Unless GlobalFoundries has completely revamped the design, then the absolute limits of the process are most likely in the 3GHz range. So far the 14nm LPP design has reached 2.4GHz Fmax on ARM Cortex A9 design, which reached 3.0GHz Fmax with on ST 28nm FD-SOI process.
Those are only speculations.
You are talking about ARM chips which have a lot of power and thermal limitations in comparison to a desktop or server X86 CPU.
There is no logic behind that 3.0ghz number, it's only an approximation. Zen could very well operate at higher frequencies.
post #217 of 241
Quote:
Originally Posted by Cyro999 View Post

Memory controller and cache is also a huge area for improvement, bulldozer always struggled a bit with both

I think they are about the lowest hanging fruit, actually.

The minimum constant per-thread module overhead, in terms of instruction latency, is 5 or 6 cycles, and it can jump in multiples of that for each branch misprediction.

Dumping the module design, by itself, will push IPC upwards - and also unevenly. Some loads are more sensitive to instruction latency (O(1) and O(n) algorithms, for example), but most are sensitive to branch misprediction penalties (especially those using more volatile data for branch determination).

That will give an easy 5~10% improvement in most benchmarks in single threaded workloads with the assumption that one thread on the module is maintained in a deep C-state, which is rather rare on Windows 7 and older. The module penalty when a thread is operating on each core of a module is another ~10-15% of the total, so we will see some dynamic situations where a 25% jump could be seen, but most of the time we will definitely be at the low end of that range (5~25% total).

The cache system, as you mentioned, is worth a decent 5%, some loads will like it more, some won't care at all. The memory controller is even less critical considering jumping from DDR3-1333 to DDR3-2666 will only net you almost 2% improvement.

Beyond dumping the module design, the next critical area of performance improvement is the fast path/issue width/ALU/AGU/TLB relationships. This is quite a complicated series of relationships, naturally, but the one thing we do know is that the core will be wider, 50% or so, and AMD has played it safe with Zen. Yes, Safe!

Zen+, I suspect, will increase the issue width or ALU/AGU utilization or scheduling as a result of real world profiling. That could bring some massive benefits from a first generation design, and supposedly Zen+ is mostly designed with some assumptions and is awaiting more data from the real Zen implementation.

I have no idea what, if anything, is planned after Zen+.


EDIT: Posted before I was done rolleyes.gif
Edited by looncraz - 9/23/15 at 11:57pm
post #218 of 241
Quote:
Originally Posted by 2010rig View Post

What AMD needs is a solid server / Enthusiast processor that cuts into Intel's 95% & 80% market share, anything less is worthless.

An 8 core / 16 thread processor with Haswell IPC, while avg OC's are 4.8... tell me that wouldn't put AMD back on the map. Especially if they price it properly below $500.

What I fear will happen is Sandy/Ivy IPC with below than 4.5 avg OC's
At $500 in the server market that would be the biggest mistake AMD has made yet. Such a chip could be sold for more depending on efficiency. Their server procs will go higher core count though.
post #219 of 241
Quote:
Originally Posted by 2010rig View Post

What I fear will happen is Sandy/Ivy IPC with below than 4.5 avg OC's
I am happy enough with 4.5GHz OC 8 cores Ivy IPC selling at $300 + the overall AM4 platform mobo being as cheap as socket 115x.
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post #220 of 241
Quote:
Originally Posted by maarten12100 View Post

At $500 in the server market that would be the biggest mistake AMD has made yet. Such a chip could be sold for more depending on efficiency. Their server procs will go higher core count though.
No, $500 for the enthusiast market, something to battle the x930K
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