Originally Posted by Artikbot
There was also no way of Intel ever making a CPU faster than the A64 after the Pentium 4/D...
Agreed. I don't think Nvidia can ever top ATI's efficiency after the Fermi disaster either.
Originally Posted by The Stilt
The only reason why Intel was able to recover so fast after their downfall with Netburst, is because they had a highly efficient core design ready (P6M), the money and the fabs. AMD meanwhile neither got a design they can or even want to modify (in the same way Intel did with P6M), the money or the fabs.
False. AMD is in the exact same boat as Intel circa 10 years ago.
- High-power architecture is inherently awful? Check.
- Still trying to squeeze as much out of it for the time being? Check.
- Actively developing a separate low-power architecture? Check.
- Using that low-power architecture as a basis for the new, not-terrible high-power architecture? Check.
- Using a design more similar to the previous good high-power architecture? Check.
Identical situations. Intel realized the P4 sucked, they went back to a P3-derived design, and much of it was based on the low-power P6M. AMD realized Bulldozer sucked, is going back to a K10-derived (IIRC) design, and much of it will be based on Jaguar/Puma. The only difference is that AMD is at TSMC's and/or GloFo's mercy when it comes to fabs.
Originally Posted by EniGma1987
Highly doubtful. There *may* be a 16 core processor for server that is two of the 8 cores glued together, and there was one rumor of a massive 16 core APU with HBM on package and everything, also going to be meant for server. There is probably only about a 5% chance we will see a 16 core CPU in the desktop space.
Probably not true. AMD's new design is actually pretty smart. Cores are arranged in quad-core modules. This shouldn't be confused with a Bulldozer-style CMT module though - they're fully independent cores - since it's more like prebuilt "blocks" that can easily make large chips. I guess it's a bit like a shader engine in a GPU? I dunno how to describe it, since I'm not aware of any current processor using a similar design. Well, there's the PS4's and Xbone's APUs with two quad-core blocks of Jaguar cores. It's likely less efficient than Intel's ringbuses for their massive Xeons, but it's surely cheaper to design.
The reason we don't have a 5M/10C or larger Vishera die is thanks to die size and yields. Vishera is pretty big at 320mm2
or so. A 5M/10C die would be 25% bigger at 400mm2
and an 8M/16C die would be a massive 640mm2
. That's assuming that the growth is linear, which it wouldn't necessarily be, but still, it's a big die. On the other hand, with 14nm, the transistor density should be on the order of twice as dense. With that same ~300-350mm2
die (Thuban's six cores were on the upper end of that, 346mm2
IIRC), they should be able to have a 16 core die give or take a quad-core block fairly easily. Using a G34-style dual-die chip, a 32-core CPU using SMT is very easily doable.
And they need that, certainly. Skylake is coming with 28C/56T dies. If AMD does a very, very good job with their SMT implementation, then they might just tie it in fully multithreaded applications.