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Fiji Bios Editing ( Fury / Fury X / Nano / Radeon Pro Duo ) - Page 83

post #821 of 1780
Thread Starter 
Quote:
Originally Posted by laum View Post

I would like to decrease the minimum fan speed on my XFX nano, but to be honest I don't really have a clue what to change. Would it be possible to get this one into Fiji bios editor?

It would be possible but I have yet to test it's effect. A member before in the thread had shown interest in this mod and IIRC was going to test it but never reported back.

In OP is heading How to edit cooling profile in ROM within it is section Extra cooling profile information for advanced manual modders, the image shows hex value which relates to:-
Code:
UCHAR   ucMinimumPWMLimit;                   /* The minimum PWM that the advanced fan controller can set.    This should be set to the highest PWM that will run the fan at its lowest RPM. */

in Powerplay of ROM, you will need to manually mod the correct offset to test it and fix checksum using Fiji bios editor app. If I have time later tonight I will test mod, then it is a case of DDSZ coding it into Fiji bios editor.
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post #822 of 1780
Quote:
Originally Posted by gupsterg View Post

It would be possible but I have yet to test it's effect. A member before in the thread had shown interest in this mod and IIRC was going to test it but never reported back.

In OP is heading How to edit cooling profile in ROM within it is section Extra cooling profile information for advanced manual modders, the image shows hex value which relates to:-
Code:
UCHAR   ucMinimumPWMLimit;                   /* The minimum PWM that the advanced fan controller can set.    This should be set to the highest PWM that will run the fan at its lowest RPM. */

in Powerplay of ROM, you will need to manually mod the correct offset to test it and fix checksum using Fiji bios editor app. If I have time later tonight I will test mod, then it is a case of DDSZ coding it into Fiji bios editor.

I actually managed to update my bios and decreased min limit 20%->5%. Tbh its quite hard to notice proper difference.
post #823 of 1780
Thread Starter 
Cheers for update smile.gif , I also tried it on my Fury X. Modded 15% to 10%, monitoring apps showed decrease of fan speed/duty cycle, ~1000RPM @ idle went to ~800RPM.

Perhaps @DDSZ will add this mod to Fiji bios editor in next release.
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post #824 of 1780
Thread Starter 
Fellow members I would like to discuss HBM clocking smile.gif .

So basically when I got my Fiji cards I noted AMD Matt had stated on a few forums that HBM clocks in discreet steps, 500.00/545.45/600.00/666.66MHz. Now bear in mind this guy is involved with AMD and also that he has no reason to share misinformation. I was surprised by this information, as when HBM overclocking became available in MSI AB, the slider would not increment in such steps as AMD Matt had posted about.

Basically HBM overclocking via MSI AB (other OC tools) will not increment in steps as it has no knowledge how HBM increments.

Next let's look at OverDrive page, the slider for HBM clock became available through bios mod, again OverDrive has no knowledge how HBM increments. If you install older Catalyst driver it will increment in 1MHz steps, with Crimison drivers it will increment in 5MHz steps.

Next VRAM_Info, this section sets up the HBM RAM. In that section we can see there are 100MHz, 400MHz, 500MHz and 600MHz straps/timings, this information is not again solid proof how HBM steps.

So basically for months viewing at all of above I was confused what is going with HBM wth.gif . 3DM13 had been the most sensitive benchmark on Hawaii for RAM tweaks, so I used it on Fiji as well. Now as HBM performance scaling was so small, it become difficult to use this bench data to categorically say how HBM clocks.

Then I thought stability testing is the answer, like highlighted in my previous posts I had assessed 1135/535 was stable for:-

i) lengthy f@h runs (12hrs+).
ii) 3DM13/Heaven/Valley each looped for over 1hrs each.
iii) general gaming.

Where as 540MHz or 540MHz was creating issues.

Then one day whilst running f@h my 1135 (+31mV) / 535 (+0mV) was failing in f@h sadsmiley.gif, I lowered HBM to 525MHz, which still did not solve the "bad state" in GPU slot. Finally only using 500MHz HBM clock solved the issue, I tested then ~ 60hrs f@h with 1135 (+31mV) / 500 (+0mV), to me this meant GPU OC was fine and HBM OC is the issue. This also meant my idea to test HBM clocking steps by stability testing was a flop doh.gif .

Due to all the wasted time testing HBM OC and lack of performance gain from it I thought just tweak lowering MVDDC below stock whilst being at 500MHz. This exercise showed that 1.2V @ 500MHz is not stable for all uses I had for GPU, ~1.263V was. This again was confusing and a setback IMO thinking.gif . SK Hynix state 1.2V, AMD state 1.3V, I can only conclude from this testing that HBM 1 due to perhaps production variation requires 1.3V.

So after failing to successfully OC HBM with full stability and under volting at stock clock I was no closer to knowing how the steps of HBM clocking were headscratch.gif. Whilst going over past data I came across an AIDA64 GPGPU benchmark which I had done on Fiji, this to me seemed like the EUREKA moment biggrin.gif.

HBM Clock/stepping testing (Click to show)
AMD Fury X 107 ROM used, only mods were:-

i) HBM clock set to 100MHz in PowerPlay.
ii) OD RAM Limit raised to 600MHz so HBM OC'ing available without using "Extend Official Overclocking Limit" in MSI AB.
iii) MVDDC set to 1.325V for testing upto HBM 600MHz.

Note: Due to my i5 rig running stability testing of Fury X No 2 @ 1135/545 I used my Q6600 rig for testing. I will update data ASAP, excluding Memory Read / Write all other bench data is spot on with i5+Fury X run done in the past.

HBM 100MHz (Click to show)

HBM 400MHz (Click to show)

HBM 500MHz (Click to show)

HBM 520MHz (Click to show)

HBM 535MHz (Click to show)

HBM 545MHz (Click to show)

HBM 565MHz (Click to show)

HBM 575MHz (Click to show)

HBM 600MHz (Click to show)


Basically 100MHz vs 400MHz huge difference, then there is large difference between 400MHz vs 500MHz. 520MHz is clocking at 500MHz. 535MHz is clocking at 545MHz and so did 565MHz. 575MHz is clocking to 600MHz and so did 630MHz (due to time limit ran 1 run, thus no screenie). I increased HBM voltage upto 1.35V to test 666MHz but as soon as bench started I got artifact on screen.

So viewing the data above I can see now why 535MHz and 525MHz was failing stability testing recently, I can only conclude why 545MHz and 540MHz artifact quicker in stability testing is due to possibly HBM clock getting close to correct step thus aspects we're unaware of concerning HBM/MC coming into play.

On the i5+Fury X rig I have been testing for just over 61.5hrs continuously using f@h to get 1135/545 stable. Initially I set HBM voltage stock and over a 22.5hr run GPU entered "bad state" twice and did not lose a work unit. So then I upped HBM voltage by +6.25mV, within 12hrs I had 1x bad state. I then increased HBM voltage to +12.5mV, within 5hrs 1x bad state, so then I went +18.75mV so far passed 22hrs f@h and going biggrin.gif . I'm gonna let this card fold until at least another 9hrs wink.gif .

I hope members will share data on AIDA64 GPGPU benchmark for HBM clocks testing.
Edited by gupsterg - 6/9/16 at 4:31am
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post #825 of 1780
Quote:
Originally Posted by gupsterg View Post

Fellow members I would like to discuss HBM clocking smile.gif .

So basically when I got my Fiji cards I noted AMD Matt had stated on a few forums that HBM clocks in discreet steps, 500.00/545.45/600.00/666.66MHz. Now bear in mind this guy is involved with AMD and also that he has no reason to share misinformation. I was surprised by this information, as when HBM overclocking became available in MSI AB, the slider would not increment in such steps as AMD Matt had posted about.

Basically HBM overclocking via MSI AB (other OC tools) will not increment in steps as it has no knowledge how HBM increments.

Next let's look at OverDrive page, the slider for HBM clock became available through bios mod, again OverDrive has no knowledge how HBM increments. If you install older Catalyst driver it will increment in 1MHz steps, with Crimison drivers it will increment in 5MHz steps.

Next VRAM_Info, this section sets up the HBM RAM. In that section we can see there are 100MHz, 400MHz, 500MHz and 600MHz straps/timings, this information is not again solid proof how HBM steps.

So basically for months viewing at all of above I was confused what is going with HBM wth.gif . 3DM13 had been the most sensitive benchmark on Hawaii for RAM tweaks, so I used it on Fiji as well. Now as HBM performance scaling was so small, it become difficult to use this bench data to categorically say how HBM clocks.

Then I thought stability testing is the answer, like highlighted in my previous posts I had assessed 1135/535 was stable for:-

i) lengthy f@h runs (12hrs+).
ii) 3DM13/Heaven/Valley each looped for over 1hrs each.
iii) general gaming.

Where as 540MHz or 540MHz was creating issues.

Then one day whilst running f@h my 1135 (+31mV) / 535 (+0mV) was failing in f@h sadsmiley.gif, I lowered HBM to 525MHz, which still did not solve the "bad state" in GPU slot. Finally only using 500MHz HBM clock solved the issue, I tested then ~ 60hrs f@h with 1135 (+31mV) / 500 (+0mV), to me this meant GPU OC was fine and HBM OC is the issue. This also meant my idea to test HBM clocking steps by stability testing was a flop doh.gif .

Due to all the wasted time testing HBM OC and lack of performance gain from it I thought just tweak lowering MVDDC below stock whilst being at 500MHz. This exercise showed that 1.2V @ 500MHz is not stable for all uses I had for GPU, ~1.263V was. This again was confusing and a setback IMO thinking.gif . SK Hynix state 1.2V, AMD state 1.3V, I can only conclude from this testing that HBM 1 due to perhaps production variation requires 1.3V.

So after failing to successfully OC HBM with full stability and under volting at stock clock I was no closer to knowing how the steps of HBM clocking were headscratch.gif. Whilst going over past data I came across an AIDA64 GPGPU benchmark which I had done on Fiji, this to me seemed like the EUREKA moment biggrin.gif.

HBM Clock/stepping testing (Click to show)
AMD Fury X 107 ROM used, only mods were:-

i) HBM clock set to 100MHz in PowerPlay.
ii) OD RAM Limit raised to 600MHz so HBM OC'ing available without using "Extend Official Overclocking Limit" in MSI AB.
iii) MVDDC set to 1.325V for testing upto HBM 600MHz.

Note: Due to my i5 rig running stability testing of Fury X No 2 @ 1135/545 I used my Q6600 rig for testing. I will update data ASAP, excluding Memory Read / Write all other bench data is spot on with i5+Fury X run done in the past.

HBM 100MHz (Click to show)

HBM 400MHz (Click to show)

HBM 500MHz (Click to show)

HBM 520MHz (Click to show)

HBM 535MHz (Click to show)

HBM 545MHz (Click to show)

HBM 565MHz (Click to show)

HBM 575MHz (Click to show)

HBM 600MHz (Click to show)


Basically 100MHz vs 400MHz huge difference, then there is large difference between 400MHz vs 500MHz. 520MHz is clocking at 500MHz. 535MHz is clocking at 545MHz and so did 565MHz. 575MHz is clocking to 600MHz and so did 630MHz (due to time limit ran 1 run, thus no screenie). I increased HBM voltage upto 1.35V to test 666MHz but as soon as bench started I got artifact on screen.

So viewing the data above I can see now why 535MHz and 525MHz was failing stability testing recently, I can only conclude why 545MHz and 540MHz artifact quicker in stability testing is due to possibly HBM clock getting close to correct step thus aspects we're unaware of concerning HBM/MC coming into play.

On the i5+Fury X rig I have been testing for just over 61.5hrs continuously using f@h to get 1135/545 stable. Initially I set HBM voltage stock and over a 22.5hr run GPU entered "bad state" twice and did not lose a work unit. So then I upped HBM voltage by +6.25mV, within 12hrs I had 1x bad state. I then increased HBM voltage to +12.5mV, within 5hrs 1x bad state, so then I went +18.75mV so far passed 22hrs f@h and going biggrin.gif . I'm gonna let this card fold until at least another 9hrs wink.gif .

I hope members will share data on AIDA64 GPGPU benchmark for HBM clocks testing.

This is a really weird synchronicity - I literally discovered this about 6 hours ago! haha my new Noctua 3000rpms arrived and I was benching my CPU with some new clockspeeds when I tried the AIDA gpgpu test - noticed it gave vmem benchmark and tried 500 vs 570 haha.
post #826 of 1780
Thread Starter 
+rep for your confirmation wink.gif .

I agree it is weird biggrin.gif .

I did not have time to test between 100MHz & 400MHz, may do when have time, but probably no use wink.gif .

I now think peeps will be grabbing my MVDDC ROMs wink.gif , if they need extra juice biggrin.gif .

I'm hoping now I can finally test 400MHz timings in 500MHz/600MHz strap making 545MHz hopefully perform better smile.gif .
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post #827 of 1780
This is some awesome research!

As you know, i've been running my memclock at 300 because in my case it gave me a better stability.

Now knowing about those straps, i will be testing with 400 in stead of 300. The only thing i'm worried about is the voltage, as i lowered that as well.

I don't know how my cards will react when setting memory to 100. I guess that'll be to low..

A shame that there isn't a strap at 250 or so.. that would in my case be awesome.

Anyhow, thank you Gupsterg, as always!

Greetings!
post #828 of 1780
Thread Starter 
No worries mate on research share smile.gif .

I have no clue if 300MHz HBM clock will be clocking to 400MHz by memory controller (did not have time to test), but you can test and share mate wink.gif .

Don't worry too much about the straps in the ROM.

100MHz strap timings will be used for HBM clock = to or < 100Mhz HBM clock.

400MHz strap timings will be used for HBM clocks 101MHz - 400MHz.

500MHz & 600MHz strap are identical timings, HBM clocks 401MHz to whatever maximum HBM clock a member can archive will use those.

As you won't be going for higher than 500MHz HBM clock I suggest make MVDDC stock in a ROM (ie 1.3V), set HBM clock as 100MHz, you won't need to increase OverDrive RAM limit in ROM as you'll be under 500MHz for HBM Clock. Then get a result for 100MHz AIDA GPGPU bench and then test increases (20-25Mhz at time perhaps) to see how bench reacts wink.gif .
Edited by gupsterg - 6/9/16 at 5:24am
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post #829 of 1780
Quote:
Originally Posted by gupsterg View Post

+rep for your confirmation wink.gif .

I agree it is weird biggrin.gif .

I did not have time to test between 100MHz & 400MHz, may do when have time, but probably no use wink.gif .

I now think peeps will be grabbing my MVDDC ROMs wink.gif , if they need extra juice biggrin.gif .

I'm hoping now I can finally test 400MHz timings in 500MHz/600MHz strap making 545MHz hopefully perform better smile.gif .

I'd be very interested in a tight timing Nano rom! I couldnt get above 570mhz stable at 1.35v on the mem but tighter timings would be welcome!
post #830 of 1780
Quote:
Originally Posted by gupsterg View Post

No worries mate on research share smile.gif .

I have no clue if 300MHz HBM clock will be clocking to 400MHz by memory controller (did not have time to test), but you can test and share mate wink.gif .

As you won't be going for higher than 500MHz HBM clock I suggest make MVDDC stock in a ROM (ie 1.3V), set HBM clock as 100MHz, you won't need to increase OverDrive RAM limit in ROM as you'll be under 500MHz for HBM Clock. Then get a result for 100MHz AIDA GPGPU bench and then test increases (20-25Mhz at time perhaps) to see how bench reacts wink.gif .

Will do later this week.

Thx again! smile.gif
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