Originally Posted by Defoler
Chip size has absolutely nothing to do with price. Not even in the slightest.
Holy Jesus Christ, Ave Maria have Mercy.
I don't even know what to tell you, beyond the fact that if creating a new product that is more expensive to manufacture than my old product, then call me Crazy, but I think that (And I don't know, I'm not a Wolf on wall Street), and that's just me, that it COULD idk maybe like, somehow affect its pricing, even in the slightest, but I could be wrong yeah.
The bigger the Chip the less yields it will have, no matter how mature the process is, every wafer will have defects, and if you intend to create huge chips out of a wafer you will certainly have wasted a few 600m2 chips for every X numbers of working 600mm2 chips, this loss will not be paying itself out by the goodness of TSMC.
Smaller chips will be proportionally cheaper because yields are astronomically better compared to bigger chips, a wafer meant for 600mm2 chips will have as many defects as one meant for 200mm2 chips, difference is that one defect on the 600mm2 wafer will mean proportionally higher loses than the same defects on wafers meant for smaller chips.
Say you have a wafer on perfect conditions meant for 50 units 600mm2 GPUs, you get 10 defects and you can lose up to 40 of these GPUs, this is worst case escenario but as Murphy's law have taught us...
Now you have the same wafer, but this one can give you in perfect conditions 125 working 200mm2 chips, add the same 10 defects and you can lose up to 40 of these 125 GPUs, but now you can sell 85 of them for each wafer in the WORST Possible scenario, and make profit.
And this is assuming each wafer present 10 defects, which is a very conservative number of defects for 14nm and 16nm wafers, you can see 10 times more defects, the positioning of each of these defects changes how many GPU dies are lost, the worst case scenario above shows how 10 defects can damage 40 600mm2 DIEs, defects can also damage 1-3 DIEs or 5 defects damaging a single one, cases where entire Wafers are unusable because the DIE sizes of 600m2 are to be expected.
Wafers for 14nm and 16nm are way more expensive than 28nm ever was, even on its infancy, you'd have to be a fool to believe chip sizes don't matter in regards to pricing.
I don't like Nvidia's pricing, and for such small chip it is certainly not justified, but I do recognize that manufacturing processes have gone up with this node shrink which is the main driving factor for these prices, that and the low availability of GDDRX5 which in turn is responsible for its Paper Launch, we know that GDDR5X will be readily available ending June as the first attempts of mass productions were barely started in mid May.
Micron have helped Nvidia to stockpile as many GDDR5X chips they can for their new cards, but that is only enough for a paper Launch, this actually goes along the idea that Nvidia may want to hold off before mass producing their new consumer Pascal Chips as yields improve, to maximize profits and availability, and this was the main reason why AMD didn't wanted to compete for the Enthusiast market yet, they are in no position to lose money.
Just look at Pascal 610mm2 chip made on this node, Nvidia doesn't care to build them and sacrifice 4 or more 610mm2 chips for each working P100 because of the price they're selling at.Edited by Dargonplay - 6/7/16 at 11:40am