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[Reddit] RX 480 fails PCI-E specification - Page 43  

post #421 of 1129
Quote:
Originally Posted by sugarhell View Post

"rasterization" ?

Nope. There are specific units for geometry processing, which include culling geometry before the ROPs do anything.



They are at the top of the shader clusters in this block diagram.
Edited by KarathKasun - 7/1/16 at 11:43am
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post #422 of 1129
ROPs play a roll in rasterization. They convert the triangles into pixels as well as filling each pixel with depth and color information.

Rasterization is a lengthy process which requires many stages.

The more GPixels the quicker the conversion occurs as well as the colorfill.
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post #423 of 1129
Quote:
Originally Posted by KarathKasun View Post

Nope. There are specific units for geometry processing, which include culling geometry before the ROPs do anything.



They are at the top of the shader clusters in this block diagram.

For gods sake read my comment again.

It is weak on rasterization and geometry output. You just explain me things that i already know and you act like a guru. Just stop it and next time read

Also pixel and texel fillrate affects geometry output. I know i work on computer graphics
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post #424 of 1129
Quote:
Originally Posted by Mahigan View Post

Do you mean gaming performance wise? The RX 480s compute performance (TFlops) are only one aspect of its potential gaming performance. We also have to contend with its 256-bit bus and GDDR5 memory resulting in 256GB/s of memory bandwidth as well as its pretty anemic Pixel Fill rate capabilities. At 1266Mhz we are talking around 40.5 GPixels vs the 390s 67.2 GPixels.

Basically... the RX 480 does not have the fillrate available to really shine. I am not sure why AMD paired it with only 32 ROPs. That sounds like an absurd thing to do when you are targeting VR performance. Perhaps their choice has a little something to do with not wanting to hurt the sales of the upcoming VEGA GPUs or maybe their current Fury lineup.
what about the texel fillrate bottleneck at int 8? the bandwidth bottleneck or Texture fetch load /store unit bottlenek? not enough L1 cache?
post #425 of 1129
Polaris has strong geometry performance relative to prior GCN architectures. I believe more than 3 times more performance despite the same number of Geometry processors.

Polaris is just very weak in terms of ROPs. Its clockspeed also does not help. That being said... Polaris does what it was meant to do... provide R9 390/390x performance for less.
Edited by Mahigan - 7/1/16 at 11:50am
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post #426 of 1129
Quote:
Originally Posted by KarathKasun View Post

Nope. There are specific units for geometry processing, which include culling geometry before the ROPs do anything.



They are at the top of the shader clusters in this block diagram.
We should discuss this in the Mahigan thread. I have questions on PDA.
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post #427 of 1129
Quote:
Originally Posted by sugarhell View Post

For gods sake read my comment again.

It is weak on rasterization and geometry output. You just explain me things that i already know and you act like a guru. Just stop it and next time read

Also pixel and texel fillrate affects geometry output. I know i work on computer graphics

If its hurting so bad in throughput, how is it scoring in the same ballpark as a card with double the resources without an astounding clock rate difference? Texel rate is pretty close, but if ROPs are so important there should be much more of a difference.
Edited by KarathKasun - 7/1/16 at 11:54am
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post #428 of 1129
I am wondering if you use dual molex to 6 or even daisy chain a few if that will lower the pci-e draw?

I don't think I've seen a 8 to 6 without the 6+2.

This is why topend Mobo's have specific pci-e power connectors onboard.

It is obvious that a bios patch is needed though.
post #429 of 1129
Quote:
Originally Posted by KarathKasun View Post

If its hurting so bad in throughput, how is it scoring in the same ballpark as a card with double the resources without an astounding clock rate difference?

Hawaii is also ROP limited and it lacks the memory compression and the bigger L2 cache. Gcn4 helps the card to reach the performance of 64 rops but still it's weak compared to nvidia performance.
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post #430 of 1129
Quote:
Originally Posted by KarathKasun View Post

Not true. If you use an eight pin connection, you could in theory source all of the GPU phases from that alone and power the vram from the slot only.
How would it ensure that power would solely be pulled from the connectors and not from the PCI-E slot at all? And wouldn't the same board change required to facilitate the 8 plug or twin 6 plug power inputs be able to fix the single 6 pin's distribution issues while maintaining the single 6 plug design? Is there no way around it at this power level? This is pretty intriguing.
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