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Polaris Bios Editing ( RX5xx / RX4xx ) - Page 59

post #581 of 3318
Yea pretty sure AMD learned this time around and wouldn't have BIOS software locks on the CUs
post #582 of 3318
@subscribers

Seen some posts and had some PMs by members regarding information on having a GPU core voltage offset within ROM, I have attached a ZIP to this post which contains:-

1. Stock ref PCB RX 480 4GB/8GB ROMs used to base the modded ROMs on.

2. Extracted stock 4GB/8GB VoltageObjectInfo table and the modified VOI.

3. Modded GPU core voltage offset ROMs (these are only for ref PCB RX 480 4GB/8GB).

There is a info file in folder 3 regarding how to mod the voltage offset ROMs contained in ZIP as you would want them.

ROMs are untested as I have no RX 480 or access to one currently, so use at your own risk.

The procedure for adding the voltage offset to a stock ROM is as posted in Hawaii bios mod regarding fSW mod. Only difference being register + data value. Instead of fSW registers the voltage offset register for IR3567B output loop 1 is used.

If anyone uses them please report back on usage experience, cheers smile.gif .

Ref_RX480_VOffset_ROMs.zip 457k .zip file
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post #583 of 3318
Great Work smile.gif

VCDD Offset or VCDDI Offset?


CREATOR: gd-jpeg v1.0 (using IJG JPEG v80), quality = 100
post #584 of 3318
i have already test the VCDD Offset with the 470 and it works great smile.gif
is there also a ROMs contain a VMIN ? in the ROM?
Edited by blue198444 - 9/17/16 at 9:42am
post #585 of 3318
So RX 470 also use IR3567B? sorry not been viewing stuff online recently as been preoccupied with "offline world" stuff.

Register 8D is output loop 1, which is GPU core voltage on Hawaii/Grenada/Fiji/Polaris.

Registers 8E is output loop 2, which is VDDCI on Hawaii/Grenada but HBM on Fiji. As output loop 2 is not used on Polaris (from info posted by The Stilt when PowerGate issue was going on) using that register would have no effect IMO. Only exception I can recall from reading this thread was where in a post by The Stilt he said the Strix RX 480 does have memory voltage control, without viewing ROM/i2c data, etc would be shot in the dark for me to say if output loop 2 on IR3567B is used for MVDD on Strix RX 480.

Any members shared ROM/i2c dump from Strix RX 480?

AFAIK know there is no VMIN register, I do not have all the registers or access to official datasheet with registers information. My knowledge of IR3567B is from:

a) viewing IR3565B PDF.
b) viewing comparing Hawaii ROMs/i2c dumps and testing "stuff".
c) information leaked by The Stilt at times.

AFAIK/IIRC the IR3567B can have +/- 800mV offsets relative to VID, with taking VMAX into consideration for + offset.
Edited by gupsterg - 9/17/16 at 10:06am
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post #586 of 3318
i hope this is the right rom smile.gif


strix.rom.zip 111k .zip file
post #587 of 3318
the SAPPHIRE NITRO RADEON RX 470 8G

have also the IR3567B

its in the Datasheet:

http://cdn-reichelt.de/documents/datenblatt/E810/SAP_11256-02-20G_DS.pdf
post #588 of 3318
Cheers smile.gif , anyone have i2c dump of Strix RX 480?

*** edit ***

ROM reveals nothing, the VOI is basically empty for registers frown.gif , so defo need i2cdump as that will show whats being set from memory feature on IR3567B (hopefully).
Code:
42 00 03 01 01 03 0E 00 08 96 40 00 00 00 00 00
FF 00 01 07 0C 00 0E 00 00 00 00 00 00 00 04 00
24 00 00 04 00 00 02 80 10 00 00 00 10 00 52 03
02 00 00 00 84 03 02 00 10 00 B6 03 00 80 10 00
E8 03

The pointer 0Eh goes to empty data and then we have FF 00 01 07 0C what I've been using to denote the end of i2c programming of IR3567B via ROM.
Edited by gupsterg - 9/17/16 at 10:40am
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post #589 of 3318
Quote:
Originally Posted by gupsterg View Post

Cheers smile.gif , anyone have i2c dump of Strix RX 480?

*** edit ***

ROM reveals nothing, the VOI is basically empty for registers frown.gif , so defo need i2cdump as that will show whats being set from memory feature on IR3567B (hopefully).
Code:
42 00 03 01 01 03 0E 00 08 96 40 00 00 00 00 00
FF 00 01 07 0C 00 0E 00 00 00 00 00 00 00 04 00
24 00 00 04 00 00 02 80 10 00 00 00 10 00 52 03
02 00 00 00 84 03 02 00 10 00 B6 03 00 80 10 00
E8 03

The pointer 0Eh goes to empty data and then we have FF 00 01 07 0C what I've been using to denote the end of i2c programming of IR3567B via ROM.

Yeah, i noticed that too a while ago.

Doesn't mean that it's not possible smile.gif

I have 77 Asus ROG Strix 480 OC 8GB, new unboxed.
If anyone from europe is interested, 255Eur per piece.

smile.gif


Greetings!
post #590 of 3318
No it doesn't mean we can't edit table to program IR3567B smile.gif , some Hawaii cards VOI was like this smile.gif .

If we take say an i2c dump of a reference RX 480 and compare with VoltageObjectInfo table of it's ROM we'll note all registers set are not in ROM. Basically whatever registers are in ROM override what is in MTP of IR3567B.
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