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post #141 of 147
Quote:
Originally Posted by Liranan View Post

This is an artificial limit. Intel obviously do it on purpose.
no, its actually what it is, intel's chipsets are in fact a PLX chip.

otherwise we'd have a gargantuan CPU socket to support that many PCI-E lanes, see LGA2011 for instance.
Edited by epic1337 - 10/7/16 at 4:08am
post #142 of 147
Quote:
Originally Posted by Liranan View Post

This is an artificial limit. Intel obviously do it on purpose.

As opposed to it being accidental?

Extra pins and traces for more CPU I/O means higher platform costs.
Quote:
Originally Posted by epic1337 View Post

no, its actually what it is, intel's chipsets are in fact a PLX chip.

PLX is a brand and while a major component of Intel's PCHes is a PCI-E switch, PLX doesn't design them or build them.
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post #143 of 147
Quote:
Originally Posted by Blameless View Post

PLX is a brand and while a major component of Intel's PCHes is a PCI-E switch, PLX doesn't design them or build them.

well it should've been obvious that i was implying that they function like those PLX chips...
post #144 of 147
Quote:
Originally Posted by epic1337 View Post

well it should've been obvious that i was implying that they function like those PLX chips...

To me it was, but I can see how others might be confused.
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post #145 of 147
Quote:
Originally Posted by Blameless View Post

To me it was, but I can see how others might be confused.

That's somehow the same as when SATA drives appeared. The technical specification originally wasn't called SATA3. What's an official name of PLX chip? I heard it only called PLX chip, or PLX multiplexer.
post #146 of 147
Quote:
Originally Posted by Raghar View Post

That's somehow the same as when SATA drives appeared. The technical specification originally wasn't called SATA3. What's an official name of PLX chip? I heard it only called PLX chip, or PLX multiplexer.

PLX was (Avago acquired them in 2014) the company/brand.

The chips are PCI-E bridges or switches, depending on what they do.
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post #147 of 147
Quote:
Originally Posted by Blameless View Post
 
Quote:
Originally Posted by Liranan View Post

This is an artificial limit. Intel obviously do it on purpose.

As opposed to it being accidental?

Extra pins and traces for more CPU I/O means higher platform costs.

What adds even more to platform cost is profit, thus Intel force buyers to pay more for PCI-E links.

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